drivers: adc: adc_stm32: convert to DT_INST defines
Convert driver to use DT_INST_ defines. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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c44a4d84e0
commit
0c9b537edf
10 changed files with 11 additions and 72 deletions
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@ -635,11 +635,11 @@ static const struct adc_driver_api api_stm32_driver_api = {
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static void adc_stm32_cfg_func_##index(void); \
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static void adc_stm32_cfg_func_##index(void); \
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\
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\
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static const struct adc_stm32_cfg adc_stm32_cfg_##index = { \
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static const struct adc_stm32_cfg adc_stm32_cfg_##index = { \
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.base = (ADC_TypeDef *)DT_ADC_##index##_BASE_ADDRESS, \
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.base = (ADC_TypeDef *)DT_INST_##index##_ST_STM32_ADC_BASE_ADDRESS,\
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.irq_cfg_func = adc_stm32_cfg_func_##index, \
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.irq_cfg_func = adc_stm32_cfg_func_##index, \
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.pclken = { \
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.pclken = { \
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.enr = DT_ADC_##index##_CLOCK_BITS, \
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.enr = DT_INST_##index##_ST_STM32_ADC_CLOCK_BITS, \
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.bus = DT_ADC_##index##_CLOCK_BUS, \
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.bus = DT_INST_##index##_ST_STM32_ADC_CLOCK_BUS, \
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}, \
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}, \
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}; \
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}; \
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static struct adc_stm32_data adc_stm32_data_##index = { \
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static struct adc_stm32_data adc_stm32_data_##index = { \
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@ -648,18 +648,20 @@ static struct adc_stm32_data adc_stm32_data_##index = { \
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ADC_CONTEXT_INIT_SYNC(adc_stm32_data_##index, ctx), \
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ADC_CONTEXT_INIT_SYNC(adc_stm32_data_##index, ctx), \
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}; \
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}; \
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\
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\
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DEVICE_AND_API_INIT(adc_##index, DT_ADC_##index##_NAME, &adc_stm32_init,\
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DEVICE_AND_API_INIT(adc_##index, DT_INST_##index##_ST_STM32_ADC_LABEL, \
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&adc_stm32_init, \
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&adc_stm32_data_##index, &adc_stm32_cfg_##index, \
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&adc_stm32_data_##index, &adc_stm32_cfg_##index, \
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, \
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, \
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&api_stm32_driver_api); \
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&api_stm32_driver_api); \
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\
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\
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static void adc_stm32_cfg_func_##index(void) \
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static void adc_stm32_cfg_func_##index(void) \
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{ \
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{ \
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IRQ_CONNECT(DT_ADC_##index##_IRQ, DT_ADC_##index##_IRQ_PRI, \
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IRQ_CONNECT(DT_INST_##index##_ST_STM32_ADC_IRQ_0, \
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DT_INST_##index##_ST_STM32_ADC_IRQ_0_PRIORITY, \
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adc_stm32_isr, DEVICE_GET(adc_##index), 0); \
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adc_stm32_isr, DEVICE_GET(adc_##index), 0); \
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irq_enable(DT_ADC_##index##_IRQ); \
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irq_enable(DT_INST_##index##_ST_STM32_ADC_IRQ_0); \
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}
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}
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#ifdef CONFIG_ADC_1
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#ifdef DT_INST_0_ST_STM32_ADC
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STM32_ADC_INIT(1)
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STM32_ADC_INIT(0);
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#endif /* CONFIG_ADC_1 */
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#endif /* DT_INST_0_ST_STM32_ADC */
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@ -190,11 +190,4 @@
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012400_BASE_ADDRESS
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#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012400_IRQ_0
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#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_40012400_IRQ_0_PRIORITY
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#define DT_ADC_1_NAME DT_ST_STM32_ADC_40012400_LABEL
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#define DT_ADC_1_CLOCK_BITS DT_ST_STM32_ADC_40012400_CLOCK_BITS_0
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#define DT_ADC_1_CLOCK_BUS DT_ST_STM32_ADC_40012400_CLOCK_BUS_0
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/* End of SoC Level DTS fixup file */
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/* End of SoC Level DTS fixup file */
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@ -211,13 +211,6 @@
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012400_BASE_ADDRESS
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#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012400_IRQ_0
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#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_40012400_IRQ_0_PRIORITY
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#define DT_ADC_1_NAME DT_ST_STM32_ADC_40012400_LABEL
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#define DT_ADC_1_CLOCK_BITS DT_ST_STM32_ADC_40012400_CLOCK_BITS_0
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#define DT_ADC_1_CLOCK_BUS DT_ST_STM32_ADC_40012400_CLOCK_BUS_0
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#define DT_CAN_1_BASE_ADDRESS DT_ST_STM32_CAN_40006400_BASE_ADDRESS
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#define DT_CAN_1_BASE_ADDRESS DT_ST_STM32_CAN_40006400_BASE_ADDRESS
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#define DT_CAN_1_BUS_SPEED DT_ST_STM32_CAN_40006400_BUS_SPEED
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#define DT_CAN_1_BUS_SPEED DT_ST_STM32_CAN_40006400_BUS_SPEED
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#define DT_CAN_1_NAME DT_ST_STM32_CAN_40006400_LABEL
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#define DT_CAN_1_NAME DT_ST_STM32_CAN_40006400_LABEL
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@ -150,11 +150,4 @@
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012000_BASE_ADDRESS
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#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012000_IRQ_0
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#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_40012000_IRQ_0_PRIORITY
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#define DT_ADC_1_NAME DT_ST_STM32_ADC_40012000_LABEL
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#define DT_ADC_1_CLOCK_BITS DT_ST_STM32_ADC_40012000_CLOCK_BITS_0
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#define DT_ADC_1_CLOCK_BUS DT_ST_STM32_ADC_40012000_CLOCK_BUS_0
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/* End of SoC Level DTS fixup file */
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/* End of SoC Level DTS fixup file */
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@ -265,13 +265,6 @@
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_50000000_BASE_ADDRESS
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#define DT_ADC_1_IRQ DT_ST_STM32_ADC_50000000_IRQ_0
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#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_50000000_IRQ_0_PRIORITY
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#define DT_ADC_1_NAME DT_ST_STM32_ADC_50000000_LABEL
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#define DT_ADC_1_CLOCK_BITS DT_ST_STM32_ADC_50000000_CLOCK_BITS_0
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#define DT_ADC_1_CLOCK_BUS DT_ST_STM32_ADC_50000000_CLOCK_BUS_0
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#define DT_CAN_1_BASE_ADDRESS DT_ST_STM32_CAN_40006400_BASE_ADDRESS
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#define DT_CAN_1_BASE_ADDRESS DT_ST_STM32_CAN_40006400_BASE_ADDRESS
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#define DT_CAN_1_BUS_SPEED DT_ST_STM32_CAN_40006400_BUS_SPEED
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#define DT_CAN_1_BUS_SPEED DT_ST_STM32_CAN_40006400_BUS_SPEED
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#define DT_CAN_1_NAME DT_ST_STM32_CAN_40006400_LABEL
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#define DT_CAN_1_NAME DT_ST_STM32_CAN_40006400_LABEL
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@ -494,13 +494,6 @@
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012000_BASE_ADDRESS
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#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012000_IRQ_0
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#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_40012000_IRQ_0_PRIORITY
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#define DT_ADC_1_NAME DT_ST_STM32_ADC_40012000_LABEL
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#define DT_ADC_1_CLOCK_BITS DT_ST_STM32_ADC_40012000_CLOCK_BITS_0
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#define DT_ADC_1_CLOCK_BUS DT_ST_STM32_ADC_40012000_CLOCK_BUS_0
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#define DT_CAN_1_BASE_ADDRESS DT_ST_STM32_CAN_40006400_BASE_ADDRESS
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#define DT_CAN_1_BASE_ADDRESS DT_ST_STM32_CAN_40006400_BASE_ADDRESS
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#define DT_CAN_1_BUS_SPEED DT_ST_STM32_CAN_40006400_BUS_SPEED
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#define DT_CAN_1_BUS_SPEED DT_ST_STM32_CAN_40006400_BUS_SPEED
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#define DT_CAN_1_NAME DT_ST_STM32_CAN_40006400_LABEL
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#define DT_CAN_1_NAME DT_ST_STM32_CAN_40006400_LABEL
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@ -392,11 +392,4 @@
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012000_BASE_ADDRESS
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#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012000_IRQ_0
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#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_40012000_IRQ_0_PRIORITY
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#define DT_ADC_1_NAME DT_ST_STM32_ADC_40012000_LABEL
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#define DT_ADC_1_CLOCK_BITS DT_ST_STM32_ADC_40012000_CLOCK_BITS_0
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#define DT_ADC_1_CLOCK_BUS DT_ST_STM32_ADC_40012000_CLOCK_BUS_0
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/* End of SoC Level DTS fixup file */
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/* End of SoC Level DTS fixup file */
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@ -135,11 +135,4 @@
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012400_BASE_ADDRESS
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#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012400_IRQ_0
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#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_40012400_IRQ_0_PRIORITY
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#define DT_ADC_1_NAME DT_ST_STM32_ADC_40012400_LABEL
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#define DT_ADC_1_CLOCK_BITS DT_ST_STM32_ADC_40012400_CLOCK_BITS_0
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#define DT_ADC_1_CLOCK_BUS DT_ST_STM32_ADC_40012400_CLOCK_BUS_0
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/* End of SoC Level DTS fixup file */
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/* End of SoC Level DTS fixup file */
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@ -314,13 +314,6 @@
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_50040000_BASE_ADDRESS
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#define DT_ADC_1_IRQ DT_ST_STM32_ADC_50040000_IRQ_0
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#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_50040000_IRQ_0_PRIORITY
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#define DT_ADC_1_NAME DT_ST_STM32_ADC_50040000_LABEL
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#define DT_ADC_1_CLOCK_BITS DT_ST_STM32_ADC_50040000_CLOCK_BITS_0
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#define DT_ADC_1_CLOCK_BUS DT_ST_STM32_ADC_50040000_CLOCK_BUS_0
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#define DT_LPTIM_1_BASE_ADDRESS DT_ST_STM32_TIMERS_40007C00_BASE_ADDRESS
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#define DT_LPTIM_1_BASE_ADDRESS DT_ST_STM32_TIMERS_40007C00_BASE_ADDRESS
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#define DT_LPTIM_1_IRQ DT_ST_STM32_TIMERS_40007C00_IRQ_0
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#define DT_LPTIM_1_IRQ DT_ST_STM32_TIMERS_40007C00_IRQ_0
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#define DT_LPTIM_1_IRQ_PRI DT_ST_STM32_TIMERS_40007C00_IRQ_0_PRIORITY
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#define DT_LPTIM_1_IRQ_PRI DT_ST_STM32_TIMERS_40007C00_IRQ_0_PRIORITY
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@ -148,13 +148,6 @@
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#define DT_TIM_STM32_17_CLOCK_BITS DT_ST_STM32_TIMERS_40014800_CLOCK_BITS
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#define DT_TIM_STM32_17_CLOCK_BITS DT_ST_STM32_TIMERS_40014800_CLOCK_BITS
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#define DT_TIM_STM32_17_CLOCK_BUS DT_ST_STM32_TIMERS_40014800_CLOCK_BUS
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#define DT_TIM_STM32_17_CLOCK_BUS DT_ST_STM32_TIMERS_40014800_CLOCK_BUS
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#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_50040000_BASE_ADDRESS
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#define DT_ADC_1_IRQ DT_ST_STM32_ADC_50040000_IRQ_0
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#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_50040000_IRQ_0_PRIORITY
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#define DT_ADC_1_NAME DT_ST_STM32_ADC_50040000_LABEL
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#define DT_ADC_1_CLOCK_BITS DT_ST_STM32_ADC_50040000_CLOCK_BITS_0
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#define DT_ADC_1_CLOCK_BUS DT_ST_STM32_ADC_50040000_CLOCK_BUS_0
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
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#define DT_LPTIM_1_BASE_ADDRESS DT_ST_STM32_TIMERS_40007C00_BASE_ADDRESS
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#define DT_LPTIM_1_BASE_ADDRESS DT_ST_STM32_TIMERS_40007C00_BASE_ADDRESS
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