From 0c8a99582e6b5f4b9403e8f2a17376a83c05b3f3 Mon Sep 17 00:00:00 2001 From: Ivo Clarysse Date: Sat, 25 Jan 2020 06:59:38 -0800 Subject: [PATCH] dts: arm: stm32f4: add CAN_2 controller Add the CAN controller device tree node for CAN_2 of the STM32F4 SoC series. Signed-off-by: Ivo Clarysse --- dts/arm/st/f4/stm32f405.dtsi | 17 +++++++++++++++++ soc/arm/st_stm32/stm32f4/dts_fixup.h | 15 +++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/dts/arm/st/f4/stm32f405.dtsi b/dts/arm/st/f4/stm32f405.dtsi index 46741ce4449..e08aeebdf30 100644 --- a/dts/arm/st/f4/stm32f405.dtsi +++ b/dts/arm/st/f4/stm32f405.dtsi @@ -193,6 +193,23 @@ phase-seg2 = <6>; }; + can2: can@40006800 { + compatible = "st,stm32-can"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40006800 0x400>; + interrupts = <63 0>, <64 0>, <65 0>, <66 0>; + interrupt-names = "TX", "RX0", "RX1", "SCE"; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x06000000>; + status = "disabled"; + label = "CAN_2"; + bus-speed = <125000>; + sjw = <1>; + prop-seg = <0>; + phase-seg1 = <5>; + phase-seg2 = <6>; + }; + }; otghs_fs_phy: otghs_fs_phy { diff --git a/soc/arm/st_stm32/stm32f4/dts_fixup.h b/soc/arm/st_stm32/stm32f4/dts_fixup.h index e248d5198a3..0c42ad20b31 100644 --- a/soc/arm/st_stm32/stm32f4/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f4/dts_fixup.h @@ -523,4 +523,19 @@ #define DT_CAN_1_CLOCK_BUS DT_ST_STM32_CAN_40006400_CLOCK_BUS #define DT_CAN_1_CLOCK_BITS DT_ST_STM32_CAN_40006400_CLOCK_BITS +#define DT_CAN_2_BASE_ADDRESS DT_ST_STM32_CAN_40006800_BASE_ADDRESS +#define DT_CAN_2_BUS_SPEED DT_ST_STM32_CAN_40006800_BUS_SPEED +#define DT_CAN_2_NAME DT_ST_STM32_CAN_40006800_LABEL +#define DT_CAN_2_IRQ_TX DT_ST_STM32_CAN_40006800_IRQ_TX +#define DT_CAN_2_IRQ_RX0 DT_ST_STM32_CAN_40006800_IRQ_RX0 +#define DT_CAN_2_IRQ_RX1 DT_ST_STM32_CAN_40006800_IRQ_RX1 +#define DT_CAN_2_IRQ_SCE DT_ST_STM32_CAN_40006800_IRQ_SCE +#define DT_CAN_2_IRQ_PRIORITY DT_ST_STM32_CAN_40006800_IRQ_0_PRIORITY +#define DT_CAN_2_SJW DT_ST_STM32_CAN_40006800_SJW +#define DT_CAN_2_PROP_SEG DT_ST_STM32_CAN_40006800_PROP_SEG +#define DT_CAN_2_PHASE_SEG1 DT_ST_STM32_CAN_40006800_PHASE_SEG1 +#define DT_CAN_2_PHASE_SEG2 DT_ST_STM32_CAN_40006800_PHASE_SEG2 +#define DT_CAN_2_CLOCK_BUS DT_ST_STM32_CAN_40006800_CLOCK_BUS +#define DT_CAN_2_CLOCK_BITS DT_ST_STM32_CAN_40006800_CLOCK_BITS + /* End of SoC Level DTS fixup file */