nrf52_bsim: Update HW models to latest and align with them
* In Zephyr: The HW models now include N interrupt controllers The interrupt handling code needs to target one controller specifically. * Update the HW models module to 57b61a9a2da75c860f15ca79522b24d57992df2c Including the following: * 57b61a9 INT CNTRL: Generalize to N controllers * 1ea8194 nrf_bsim_redef.h: Add first definitions for nrf5340 * 5f81ee9 irq_ctrl: Lower a bit HW event priority * 0986acc RNG: Add nrf53 variant in model * 09345da RNG: Generate level interrupts instead of pulse ones * f9b7c7a DPPI: Add first version * 62dabd3 HW models: Initial peripheral adaptation for multi-int_cntr * f54b59d HW models: Adding initial nrf5340 structure * fb1edd9 HW models: Use HW types definitions only where neded * 2744f4c Add basic support for variants * a5f79cd nrf_bsim_redef.h: Remove unnecessary redefinitions * 2c781dd HW_models: Improve includes * bdb0a08 minor: Remove non-ASCII characters from source * b5e95bd RADIO: Corrected note about MAXLEN and CRCINC behaviour Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This commit is contained in:
Alberto Escolar Piedras
Fabio Baltieri
parent
3973475719
commit
0c55710040
3 changed files with 34 additions and 32 deletions
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@ -17,32 +17,32 @@
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*/
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void NVIC_SetPendingIRQ(IRQn_Type IRQn)
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{
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hw_irq_ctrl_raise_im_from_sw(IRQn);
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hw_irq_ctrl_raise_im_from_sw(CONFIG_NATIVE_SIMULATOR_CPU_N, IRQn);
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}
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void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
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{
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hw_irq_ctrl_clear_irq(IRQn);
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hw_irq_ctrl_clear_irq(CONFIG_NATIVE_SIMULATOR_CPU_N, IRQn);
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}
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void NVIC_DisableIRQ(IRQn_Type IRQn)
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{
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hw_irq_ctrl_disable_irq(IRQn);
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hw_irq_ctrl_disable_irq(CONFIG_NATIVE_SIMULATOR_CPU_N, IRQn);
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}
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void NVIC_EnableIRQ(IRQn_Type IRQn)
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{
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hw_irq_ctrl_enable_irq(IRQn);
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hw_irq_ctrl_enable_irq(CONFIG_NATIVE_SIMULATOR_CPU_N, IRQn);
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}
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void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
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{
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hw_irq_ctrl_prio_set(IRQn, priority);
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hw_irq_ctrl_prio_set(CONFIG_NATIVE_SIMULATOR_CPU_N, IRQn, priority);
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}
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uint32_t NVIC_GetPriority(IRQn_Type IRQn)
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{
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return hw_irq_ctrl_get_prio(IRQn);
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return hw_irq_ctrl_get_prio(CONFIG_NATIVE_SIMULATOR_CPU_N, IRQn);
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}
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void NVIC_SystemReset(void)
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@ -55,22 +55,22 @@ void NVIC_SystemReset(void)
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*/
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void __enable_irq(void)
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{
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hw_irq_ctrl_change_lock(false);
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hw_irq_ctrl_change_lock(CONFIG_NATIVE_SIMULATOR_CPU_N, false);
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}
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void __disable_irq(void)
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{
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hw_irq_ctrl_change_lock(true);
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hw_irq_ctrl_change_lock(CONFIG_NATIVE_SIMULATOR_CPU_N, true);
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}
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uint32_t __get_PRIMASK(void)
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{
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return hw_irq_ctrl_get_current_lock();
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return hw_irq_ctrl_get_current_lock(CONFIG_NATIVE_SIMULATOR_CPU_N);
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}
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void __set_PRIMASK(uint32_t primask)
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{
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hw_irq_ctrl_change_lock(primask != 0);
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hw_irq_ctrl_change_lock(CONFIG_NATIVE_SIMULATOR_CPU_N, primask != 0);
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}
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void __WFE(void)
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@ -25,7 +25,7 @@ static bool CPU_will_be_awaken_from_WFE;
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typedef void (*normal_irq_f_ptr)(const void *);
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typedef int (*direct_irq_f_ptr)(void);
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static struct _isr_list irq_vector_table[NRF_HW_NBR_IRQs];
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static struct _isr_list irq_vector_table[NHW_INTCTRL_MAX_INTLINES];
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static int currently_running_irq = -1;
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@ -43,7 +43,7 @@ static inline void vector_to_irq(int irq_nbr, int *may_swap)
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}
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bs_trace_raw_time(6, "Vectoring to irq %i (%s)\n", irq_nbr,
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hw_irq_ctrl_get_name(irq_nbr));
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hw_irq_ctrl_get_name(CONFIG_NATIVE_SIMULATOR_CPU_N, irq_nbr));
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sys_trace_isr_enter();
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@ -69,7 +69,8 @@ static inline void vector_to_irq(int irq_nbr, int *may_swap)
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sys_trace_isr_exit();
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bs_trace_raw_time(7, "Irq %i (%s) ended\n", irq_nbr, hw_irq_ctrl_get_name(irq_nbr));
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bs_trace_raw_time(7, "Irq %i (%s) ended\n", irq_nbr,
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hw_irq_ctrl_get_name(CONFIG_NATIVE_SIMULATOR_CPU_N, irq_nbr));
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}
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/**
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@ -85,8 +86,9 @@ void posix_irq_handler(void)
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uint64_t irq_lock;
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int irq_nbr;
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static int may_swap;
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const int cpu_n = CONFIG_NATIVE_SIMULATOR_CPU_N;
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irq_lock = hw_irq_ctrl_get_current_lock();
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irq_lock = hw_irq_ctrl_get_current_lock(cpu_n);
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if (irq_lock) {
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/* "spurious" wakes can happen with interrupts locked */
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@ -99,20 +101,20 @@ void posix_irq_handler(void)
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_kernel.cpus[0].nested++;
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while ((irq_nbr = hw_irq_ctrl_get_highest_prio_irq()) != -1) {
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int last_current_running_prio = hw_irq_ctrl_get_cur_prio();
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while ((irq_nbr = hw_irq_ctrl_get_highest_prio_irq(cpu_n)) != -1) {
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int last_current_running_prio = hw_irq_ctrl_get_cur_prio(cpu_n);
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int last_running_irq = currently_running_irq;
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hw_irq_ctrl_set_cur_prio(hw_irq_ctrl_get_prio(irq_nbr));
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hw_irq_ctrl_clear_irq(irq_nbr);
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hw_irq_ctrl_set_cur_prio(cpu_n, hw_irq_ctrl_get_prio(cpu_n, irq_nbr));
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hw_irq_ctrl_clear_irq(cpu_n, irq_nbr);
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currently_running_irq = irq_nbr;
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vector_to_irq(irq_nbr, &may_swap);
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currently_running_irq = last_running_irq;
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hw_irq_ctrl_reeval_level_irq(irq_nbr);
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hw_irq_ctrl_reeval_level_irq(cpu_n, irq_nbr);
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hw_irq_ctrl_set_cur_prio(last_current_running_prio);
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hw_irq_ctrl_set_cur_prio(cpu_n, last_current_running_prio);
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}
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_kernel.cpus[0].nested--;
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@ -124,7 +126,7 @@ void posix_irq_handler(void)
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* 4) we are in a irq postfix (not just in a WFE)
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*/
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if (may_swap
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&& (hw_irq_ctrl_get_cur_prio() == 256)
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&& (hw_irq_ctrl_get_cur_prio(cpu_n) == 256)
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&& (CPU_will_be_awaken_from_WFE == false)
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&& (_kernel.ready_q.cache) && (_kernel.ready_q.cache != _current)) {
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@ -144,7 +146,7 @@ void posix_irq_handler_im_from_sw(void)
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* pending we go immediately into irq_handler() to vector into its
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* handler
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*/
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if (hw_irq_ctrl_get_highest_prio_irq() != -1) {
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if (hw_irq_ctrl_get_highest_prio_irq(CONFIG_NATIVE_SIMULATOR_CPU_N) != -1) {
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if (!posix_is_cpu_running()) { /* LCOV_EXCL_BR_LINE */
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/* LCOV_EXCL_START */
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posix_print_error_and_exit("programming error: %s "
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@ -189,7 +191,7 @@ void posix_irq_handler_im_from_sw(void)
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*/
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unsigned int posix_irq_lock(void)
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{
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return hw_irq_ctrl_change_lock(true);
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return hw_irq_ctrl_change_lock(CONFIG_NATIVE_SIMULATOR_CPU_N, true);
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}
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/**
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@ -203,27 +205,27 @@ unsigned int posix_irq_lock(void)
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*/
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void posix_irq_unlock(unsigned int key)
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{
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hw_irq_ctrl_change_lock(key);
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hw_irq_ctrl_change_lock(CONFIG_NATIVE_SIMULATOR_CPU_N, key);
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}
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void posix_irq_full_unlock(void)
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{
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hw_irq_ctrl_change_lock(false);
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hw_irq_ctrl_change_lock(CONFIG_NATIVE_SIMULATOR_CPU_N, false);
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}
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void posix_irq_enable(unsigned int irq)
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{
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hw_irq_ctrl_enable_irq(irq);
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hw_irq_ctrl_enable_irq(CONFIG_NATIVE_SIMULATOR_CPU_N, irq);
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}
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void posix_irq_disable(unsigned int irq)
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{
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hw_irq_ctrl_disable_irq(irq);
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hw_irq_ctrl_disable_irq(CONFIG_NATIVE_SIMULATOR_CPU_N, irq);
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}
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int posix_irq_is_enabled(unsigned int irq)
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{
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return hw_irq_ctrl_is_irq_enabled(irq);
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return hw_irq_ctrl_is_irq_enabled(CONFIG_NATIVE_SIMULATOR_CPU_N, irq);
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}
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int posix_get_current_irq(void)
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@ -264,7 +266,7 @@ void posix_isr_declare(unsigned int irq_p, int flags, void isr_p(const void *),
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*/
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void posix_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
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{
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hw_irq_ctrl_prio_set(irq, prio);
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hw_irq_ctrl_prio_set(CONFIG_NATIVE_SIMULATOR_CPU_N, irq, prio);
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}
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/**
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@ -277,7 +279,7 @@ void posix_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
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*/
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void posix_sw_set_pending_IRQ(unsigned int IRQn)
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{
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hw_irq_ctrl_raise_im_from_sw(IRQn);
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hw_irq_ctrl_raise_im_from_sw(CONFIG_NATIVE_SIMULATOR_CPU_N, IRQn);
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}
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/**
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@ -286,7 +288,7 @@ void posix_sw_set_pending_IRQ(unsigned int IRQn)
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*/
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void posix_sw_clear_pending_IRQ(unsigned int IRQn)
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{
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hw_irq_ctrl_clear_irq(IRQn);
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hw_irq_ctrl_clear_irq(CONFIG_NATIVE_SIMULATOR_CPU_N, IRQn);
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}
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#ifdef CONFIG_IRQ_OFFLOAD
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2
west.yml
2
west.yml
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@ -297,7 +297,7 @@ manifest:
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groups:
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- tools
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- name: nrf_hw_models
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revision: 5993de6656e9c9238e975393c402d2f70339a1b3
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revision: 57b61a9a2da75c860f15ca79522b24d57992df2c
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path: modules/bsim_hw_models/nrf_hw_models
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- name: open-amp
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revision: 42b7c577714b8f22ce82a901e19c1814af4609a8
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