misc: Generalize LOAD_OFFSET support

Instead of FLASH_LOAD_OFFSET being something specific to cortex-m, add
it generally to misc/Kconfig, along with a hidden config
HAS_LOAD_OFFSET which can be selected by the architectures as they add
support for the functionality.

Change-Id: I256ff8cf4e9b8493b26354c3b93fe1f7017d4887
Signed-off-by: David Brown <david.brown@linaro.org>
This commit is contained in:
David Brown 2017-04-10 10:30:51 -06:00 committed by Anas Nashif
commit 0c476a58b7
3 changed files with 18 additions and 11 deletions

View file

@ -20,6 +20,7 @@ config CPU_CORTEX_M
select CPU_CORTEX
select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
select HAS_CMSIS
select HAS_FLASH_LOAD_OFFSET
help
This option signifies the use of a CPU of the Cortex-M family.

View file

@ -199,17 +199,6 @@ config FLASH_BASE_ADDRESS
This option specifies the base address of the flash on the board. It is
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
config FLASH_LOAD_OFFSET
hex "Kernel load offset"
default 0
help
This option specifies the byte offset from FLASH_BASE_ADDRESS that the
kernel should be loaded into. Changing this value from zero will affect
the Zephyr image's link, and will decrease the total amount of flash
available for use by application code.
If unsure, leave at the default value 0.
endmenu
menu "ARM Cortex-M0/M0+/M3/M4/M7 options"

View file

@ -9,6 +9,23 @@
menu "Compile and Link Features"
menu "Linker Options"
config HAS_FLASH_LOAD_OFFSET
bool
help
This option is selected by targets having a FLASH_LOAD_OFFSET.
config FLASH_LOAD_OFFSET
hex "Kernel load offset"
default 0
depends on HAS_FLASH_LOAD_OFFSET
help
This option specifies the byte offset from the beginning of flash that
the kernel should be loaded into. Changing this value from zero will
affect the Zephyr image's link, and will decrease the total amount of
flash available for use by application code.
If unsure, leave at the default value 0.
config TEXT_SECTION_OFFSET
hex "TEXT section offset"
default 0