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boards: nxp: frdm_mcxn947: enable flexcan0

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Enable FlexCAN0 on the NXP FRDM-MCXN947 board.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit is contained in:
Henrik Brix Andersen 2024-05-08 14:09:22 +00:00 • committed by Fabio Baltieri
commit 0c3114cc01
7 changed files with 49 additions and 2 deletions
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24
boards/nxp/frdm_mcxn947/board.c
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@ -106,6 +106,25 @@ static int frdm_mcxn947_init(void)
CLOCK_SetupExtClocking(BOARD_XTAL0_CLK_HZ);
#if DT_NODE_HAS_STATUS(DT_NODELABEL(flexcan0), okay)
/* Set up PLL1 for 80 MHz FlexCAN clock */
const pll_setup_t pll1Setup = {
.pllctrl = SCG_SPLLCTRL_SOURCE(1U) | SCG_SPLLCTRL_SELI(27U) |
SCG_SPLLCTRL_SELP(13U),
.pllndiv = SCG_SPLLNDIV_NDIV(3U),
.pllpdiv = SCG_SPLLPDIV_PDIV(1U),
.pllmdiv = SCG_SPLLMDIV_MDIV(10U),
.pllRate = 80000000U
};
/* Configure PLL1 to the desired values */
CLOCK_SetPLL1Freq(&pll1Setup);
/* PLL1 Monitor is disabled */
CLOCK_SetPll1MonitorMode(kSCG_Pll1MonitorDisable);
/* Set PLL1 CLK0 divider to value 1 */
CLOCK_SetClkDiv(kCLOCK_DivPLL1Clk0, 1U);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(flexcomm1), okay)
CLOCK_SetClkDiv(kCLOCK_DivFlexcom1Clk, 1u);
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM1);
@ -203,6 +222,11 @@ static int frdm_mcxn947_init(void)
CLOCK_AttachClk(kPLL0_to_CTIMER4);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(flexcan0), okay)
CLOCK_SetClkDiv(kCLOCK_DivFlexcan0Clk, 1U);
CLOCK_AttachClk(kPLL1_CLK0_to_FLEXCAN0);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc0), okay)
CLOCK_SetClkDiv(kCLOCK_DivUSdhcClk, 1u);
CLOCK_AttachClk(kFRO_HF_to_USDHC);