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soc: x86: arc: Remove spi base address and irq macros

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Now that we get the spi base address and irq numbers from dts, we can
remove the preprocessor macros from soc.h

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2018-09-27 08:47:50 -05:00 • committed by Anas Nashif
commit 0be600016c
4 changed files with 0 additions and 25 deletions
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10
soc/arc/quark_se_c1000_ss/soc.h
View file

@ -57,13 +57,6 @@
#define IRQ_I2C1_TX_REQ 23
#define IRQ_I2C1_STOP_DET 24
#define IRQ_I2C1_ERR 25
#define IRQ_SPI0_ERR_INT 30
#define IRQ_SPI0_RX_AVAIL 31
#define IRQ_SPI0_TX_REQ 32
#define IRQ_SPI1_ERR_INT 33
#define IRQ_SPI1_RX_AVAIL 34
#define IRQ_SPI1_TX_REQ 35
#define IRQ_ADC_ERR 18
#define IRQ_ADC_IRQ 19
@ -174,9 +167,6 @@
#ifdef CONFIG_SPI_DW
#define SPI_DW_PORT_0_REGS 0x80010000
#define SPI_DW_PORT_1_REGS 0x80010100
#define SPI_DW_PORT_0_ERROR_INT_MASK (SCSS_REGISTER_BASE + 0x430)
#define SPI_DW_PORT_0_RX_INT_MASK (SCSS_REGISTER_BASE + 0x434)
#define SPI_DW_PORT_0_TX_INT_MASK (SCSS_REGISTER_BASE + 0x438)

7
soc/arc/snps_emsk/soc.h
View file

@ -90,9 +90,6 @@
/* SPI */
#define SPI_DW_SPI_CLOCK SYSCLK_DEFAULT_IOSC_HZ
#define SPI_DW_PORT_0_REGS 0xF0006000
#define SPI_DW_PORT_1_REGS 0xF0007000
#define SPI_DW_IRQ_FLAGS 0
/*
@ -113,14 +110,10 @@
#define GPIO_DW_0_IRQ 24
#define CONFIG_I2C_0_IRQ 25
#define CONFIG_I2C_1_IRQ 26
#define SPI_DW_PORT_0_IRQ 27
#define SPI_DW_PORT_1_IRQ 28
#else /* CONFIG_BOARD_EM_STARTERKIT_R23 */
#define GPIO_DW_0_IRQ 22
#define CONFIG_I2C_0_IRQ 23
#define CONFIG_I2C_1_IRQ 24
#define SPI_DW_PORT_0_IRQ 25
#define SPI_DW_PORT_1_IRQ 26
#endif /* !CONFIG_BOARD_EM_STARTERKIT_R23 */
#define GPIO_DW_1_IRQ 0 /* can't interrupt */

2
soc/x86/intel_quark/quark_d2000/soc.h
View file

@ -48,8 +48,6 @@
#ifdef CONFIG_SPI_DW
#define SPI_DW_PORT_0_REGS 0xB0001000
#define SPI_DW_PORT_0_IRQ 2
#define SPI_DW_PORT_0_INT_MASK (SCSS_REGISTER_BASE + 0x454)
#define SPI_DW_IRQ_FLAGS (IOAPIC_LEVEL | IOAPIC_HIGH)

6
soc/x86/intel_quark/quark_se/soc.h
View file

@ -64,16 +64,10 @@
#ifdef CONFIG_SPI_DW
#define SPI_DW_PORT_0_REGS 0xB0001000
#define SPI_DW_PORT_0_IRQ 2
#define SPI_DW_PORT_0_INT_MASK (SCSS_REGISTER_BASE + 0x454)
#define SPI_DW_PORT_1_REGS 0xB0001400
#define SPI_DW_PORT_1_IRQ 3
#define SPI_DW_PORT_1_INT_MASK (SCSS_REGISTER_BASE + 0x458)
#define SPI_DW_PORT_2_REGS 0xB0001800
#define SPI_DW_PORT_2_IRQ 4
#define SPI_DW_PORT_2_INT_MASK (SCSS_REGISTER_BASE + 0x45C)
#define SPI_DW_IRQ_FLAGS (IOAPIC_LEVEL | IOAPIC_HIGH)