diff --git a/drivers/adc/adc_stm32.c b/drivers/adc/adc_stm32.c index ce8299832d8..4f9318ef2f4 100644 --- a/drivers/adc/adc_stm32.c +++ b/drivers/adc/adc_stm32.c @@ -549,6 +549,7 @@ static int adc_stm32_init(const struct device *dev) const struct device *clk = device_get_binding(STM32_CLOCK_CONTROL_NAME); ADC_TypeDef *adc = (ADC_TypeDef *)config->base; + int err; LOG_DBG("Initializing...."); @@ -568,10 +569,13 @@ static int adc_stm32_init(const struct device *dev) return -EIO; } - /* configure pinmux */ - if (config->pinctrl_len != 0U) { - stm32_dt_pinctrl_configure(config->pinctrl, - config->pinctrl_len); + /* Configure dt provided device signals when available */ + err = stm32_dt_pinctrl_configure(config->pinctrl, + config->pinctrl_len, + (uint32_t)config->base); + if (err < 0) { + LOG_ERR("ADC pinctrl setup failed (%d)", err); + return err; } #if defined(CONFIG_SOC_SERIES_STM32L4X) || \ diff --git a/drivers/can/can_stm32.c b/drivers/can/can_stm32.c index 7c0df8532f1..aa3162550f8 100644 --- a/drivers/can/can_stm32.c +++ b/drivers/can/can_stm32.c @@ -410,22 +410,13 @@ static int can_stm32_init(const struct device *dev) return -EIO; } - /* configure pinmux */ - if (cfg->pinctrl_len != 0U) { - - if (IS_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl))) { - int remap; - /* Check remap configuration is coherent across pins */ - remap = stm32_dt_pinctrl_remap_check(cfg->pinctrl, - cfg->pinctrl_len); - if (remap < 0) { - return remap; - } - - stm32_dt_pinctrl_remap_set((uint32_t)cfg->can, remap); - } - - stm32_dt_pinctrl_configure(cfg->pinctrl, cfg->pinctrl_len); + /* Configure dt provided device signals when available */ + ret = stm32_dt_pinctrl_configure(cfg->pinctrl, + cfg->pinctrl_len, + (uint32_t)cfg->can); + if (ret < 0) { + LOG_ERR("CAN pinctrl setup failed (%d)", ret); + return ret; } ret = can_leave_sleep_mode(can); diff --git a/drivers/dac/dac_stm32.c b/drivers/dac/dac_stm32.c index d1d3122ae19..3ac9c53f797 100644 --- a/drivers/dac/dac_stm32.c +++ b/drivers/dac/dac_stm32.c @@ -117,6 +117,7 @@ static int dac_stm32_channel_setup(const struct device *dev, static int dac_stm32_init(const struct device *dev) { const struct dac_stm32_cfg *cfg = dev->config; + int err; /* enable clock for subsystem */ const struct device *clk = @@ -127,9 +128,13 @@ static int dac_stm32_init(const struct device *dev) return -EIO; } - /* configure pinmux */ - if (cfg->pinctrl_len != 0U) { - stm32_dt_pinctrl_configure(cfg->pinctrl, cfg->pinctrl_len); + /* Configure dt provided device signals when available */ + err = stm32_dt_pinctrl_configure(cfg->pinctrl, + cfg->pinctrl_len, + (uint32_t)cfg->base); + if (err < 0) { + LOG_ERR("DAC pinctrl setup failed (%d)", err); + return err; } return 0; diff --git a/drivers/i2c/i2c_ll_stm32.c b/drivers/i2c/i2c_ll_stm32.c index ba15eb155c4..47374e4ca9f 100644 --- a/drivers/i2c/i2c_ll_stm32.c +++ b/drivers/i2c/i2c_ll_stm32.c @@ -188,22 +188,13 @@ static int i2c_stm32_init(const struct device *dev) cfg->irq_config_func(dev); #endif - if (cfg->pinctrl_list_size != 0) { - - if (IS_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl))) { - int remap; - /* Check remap configuration is coherent across pins */ - remap = stm32_dt_pinctrl_remap_check(cfg->pinctrl_list, - cfg->pinctrl_list_size); - if (remap < 0) { - return remap; - } - - stm32_dt_pinctrl_remap_set((uint32_t)cfg->i2c, remap); - } - - stm32_dt_pinctrl_configure(cfg->pinctrl_list, - cfg->pinctrl_list_size); + /* Configure dt provided device signals when available */ + ret = stm32_dt_pinctrl_configure(cfg->pinctrl_list, + cfg->pinctrl_list_size, + (uint32_t)cfg->i2c); + if (ret < 0) { + LOG_ERR("I2C pinctrl setup failed (%d)", ret); + return ret; } /* diff --git a/drivers/pinmux/stm32/pinmux_stm32.c b/drivers/pinmux/stm32/pinmux_stm32.c index 197f3645678..23161360573 100644 --- a/drivers/pinmux/stm32/pinmux_stm32.c +++ b/drivers/pinmux/stm32/pinmux_stm32.c @@ -122,15 +122,31 @@ static int stm32_pin_configure(uint32_t pin, uint32_t func, uint32_t altf) * * @param *pinctrl pointer to soc_gpio_pinctrl list * @param list_size list size + * @param base device base register value + * + * @return 0 on success, -EINVAL otherwise */ - -void stm32_dt_pinctrl_configure(const struct soc_gpio_pinctrl *pinctrl, - size_t list_size) +int stm32_dt_pinctrl_configure(const struct soc_gpio_pinctrl *pinctrl, + size_t list_size, uint32_t base) { const struct device *clk; uint32_t pin, mux; uint32_t func = 0; + if (!list_size) { + /* Empty pinctrl. Exit */ + return 0; + } + +#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) + if (!stm32_dt_pinctrl_remap(pinctrl, list_size, base)) { + /* Wrong remap config. Exit */ + return -EINVAL; + } +#else + ARG_UNUSED(base); +#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */ + /* make sure to enable port clock first */ clk = device_get_binding(STM32_CLOCK_CONTROL_NAME); @@ -177,23 +193,26 @@ void stm32_dt_pinctrl_configure(const struct soc_gpio_pinctrl *pinctrl, stm32_pin_configure(pin, func, STM32_DT_PINMUX_FUNC(mux)); } - + return 0; } +#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) /** - * @brief Helper function to check provided pinctrl remap configuration (Pin - * remapping configuration should be the same on all pins) + * @brief Helper function to check and apply provided pinctrl remap + * configuration + * + * Check operation verifies that pin remapping configuration is the same on all + * pins. If configuration is valid AFIO clock is enabled and remap is applied * * @param *pinctrl pointer to soc_gpio_pinctrl list * @param list_size list size + * @param base device base register value * - * @return remap value on success, -EINVAL otherwise + * @return 0 on success, -EINVAL otherwise */ - -int stm32_dt_pinctrl_remap_check(const struct soc_gpio_pinctrl *pinctrl, - size_t list_size) +int stm32_dt_pinctrl_remap(const struct soc_gpio_pinctrl *pinctrl, + size_t list_size, uint32_t base) { -#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) int remap; uint32_t mux; @@ -204,22 +223,11 @@ int stm32_dt_pinctrl_remap_check(const struct soc_gpio_pinctrl *pinctrl, remap = STM32_DT_PINMUX_REMAP(mux); if (STM32_DT_PINMUX_REMAP(mux) != remap) { - remap = -EINVAL; - break; + return -EINVAL; } } - return remap; -#else - return 0; -#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */ -} - -void stm32_dt_pinctrl_remap_set(uint32_t base, int remap) -{ -#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) - - /* A valid remapping configuration is provided */ + /* A valid remapping configuration is available */ /* Apply remapping before proceeding with pin configuration */ LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); @@ -423,8 +431,10 @@ void stm32_dt_pinctrl_remap_set(uint32_t base, int remap) #endif } -#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */ + return 0; } +#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */ + /** * @brief pin setup diff --git a/drivers/pinmux/stm32/pinmux_stm32.h b/drivers/pinmux/stm32/pinmux_stm32.h index 1af51df4f55..a2551036f0d 100644 --- a/drivers/pinmux/stm32/pinmux_stm32.h +++ b/drivers/pinmux/stm32/pinmux_stm32.h @@ -143,31 +143,31 @@ void stm32_setup_pins(const struct pin_config *pinconf, * format * * @param *pinctrl pointer to soc_gpio_pinctrl list - * @param list_size provided list size + * @param list_size list size + * @param base device base register value * + * @return 0 on success, -EINVAL otherwise */ -void stm32_dt_pinctrl_configure(const struct soc_gpio_pinctrl *pinctrl, - size_t list_size); +int stm32_dt_pinctrl_configure(const struct soc_gpio_pinctrl *pinctrl, + size_t list_size, uint32_t base); +#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) /** - * @brief Helper function to check provided pinctrl remap configuration (Pin - * remapping configuration should be the same on all pins) + * @brief Helper function to check and apply provided pinctrl remap + * configuration + * + * Check operation verifies that pin remapping configuration is the same on all + * pins. If configuration is valid AFIO clock is enabled and remap is applied * * @param *pinctrl pointer to soc_gpio_pinctrl list - * @param list_size provided list size + * @param list_size list size + * @param base device base register value * - * @return remap value on success, -EINVAL otherwise + * @return 0 value on success, -EINVAL otherwise */ -int stm32_dt_pinctrl_remap_check(const struct soc_gpio_pinctrl *pinctrl, - size_t list_size); - -/** - * @brief - * - * @param - * @param - */ -void stm32_dt_pinctrl_remap_set(uint32_t base, int remap); +int stm32_dt_pinctrl_remap(const struct soc_gpio_pinctrl *pinctrl, + size_t list_size, uint32_t base); +#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */ /* common pinmux device name for all STM32 chips */ #define STM32_PINMUX_NAME "stm32-pinmux" diff --git a/drivers/pwm/pwm_stm32.c b/drivers/pwm/pwm_stm32.c index 80612ba8626..18294a34faa 100644 --- a/drivers/pwm/pwm_stm32.c +++ b/drivers/pwm/pwm_stm32.c @@ -282,23 +282,12 @@ static int pwm_stm32_init(const struct device *dev) } /* configure pinmux */ - if (cfg->pinctrl_len != 0U) { - - if (IS_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl))) { - int remap; - - remap = stm32_dt_pinctrl_remap_check(cfg->pinctrl, - cfg->pinctrl_len); - if (remap < 0) { - LOG_ERR("pinctrl remap check failed (%d)", - remap); - return remap; - } - - stm32_dt_pinctrl_remap_set((uint32_t)cfg->timer, remap); - } - - stm32_dt_pinctrl_configure(cfg->pinctrl, cfg->pinctrl_len); + r = stm32_dt_pinctrl_configure(cfg->pinctrl, + cfg->pinctrl_len, + (uint32_t)cfg->timer); + if (r < 0) { + LOG_ERR("PWM pinctrl setup failed (%d)", r); + return r; } /* initialize timer */ diff --git a/drivers/serial/uart_stm32.c b/drivers/serial/uart_stm32.c index 9d65b956b70..611c5226ef8 100644 --- a/drivers/serial/uart_stm32.c +++ b/drivers/serial/uart_stm32.c @@ -670,6 +670,7 @@ static int uart_stm32_init(const struct device *dev) USART_TypeDef *UartInstance = UART_STRUCT(dev); uint32_t ll_parity; uint32_t ll_datawidth; + int err; __uart_stm32_get_clock(dev); /* enable clock */ @@ -679,23 +680,11 @@ static int uart_stm32_init(const struct device *dev) } /* Configure dt provided device signals when available */ - if (config->pinctrl_list_size != 0) { - if (IS_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl))) { - int remap; - /* Check remap configuration is coherent across pins */ - remap = stm32_dt_pinctrl_remap_check( - config->pinctrl_list, - config->pinctrl_list_size); - if (remap < 0) { - return remap; - } - - stm32_dt_pinctrl_remap_set((uint32_t)UART_STRUCT(dev), - remap); - } - - stm32_dt_pinctrl_configure(config->pinctrl_list, - config->pinctrl_list_size); + err = stm32_dt_pinctrl_configure(config->pinctrl_list, + config->pinctrl_list_size, + (uint32_t)UART_STRUCT(dev)); + if (err < 0) { + return err; } LL_USART_Disable(UartInstance); diff --git a/drivers/spi/spi_ll_stm32.c b/drivers/spi/spi_ll_stm32.c index 8627dd4cc5f..4dd332d72ca 100644 --- a/drivers/spi/spi_ll_stm32.c +++ b/drivers/spi/spi_ll_stm32.c @@ -789,6 +789,7 @@ static int spi_stm32_init(const struct device *dev) { struct spi_stm32_data *data __attribute__((unused)) = dev->data; const struct spi_stm32_config *cfg = dev->config; + int err; __ASSERT_NO_MSG(device_get_binding(STM32_CLOCK_CONTROL_NAME)); @@ -799,22 +800,12 @@ static int spi_stm32_init(const struct device *dev) } /* Configure dt provided device signals when available */ - if (cfg->pinctrl_list_size != 0) { - - if (IS_ENABLED(DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl))) { - int remap; - /* Check remap configuration is coherent across pins */ - remap = stm32_dt_pinctrl_remap_check(cfg->pinctrl_list, - cfg->pinctrl_list_size); - if (remap < 0) { - return remap; - } - - stm32_dt_pinctrl_remap_set((uint32_t)cfg->spi, remap); - } - - stm32_dt_pinctrl_configure(cfg->pinctrl_list, - cfg->pinctrl_list_size); + err = stm32_dt_pinctrl_configure(cfg->pinctrl_list, + cfg->pinctrl_list_size, + (uint32_t)cfg->spi); + if (err < 0) { + LOG_ERR("SPI pinctrl setup failed (%d)", err); + return err; } #ifdef CONFIG_SPI_STM32_INTERRUPT