drivers: adc: stm32h7 adc driver has a different oversampling ratio
The adc_stm32_oversampling function is used to configure the ratio and shift for each sequence->oversampling depending on the soc serie and ADC instance in the serie In the stm32H7 serie, only ADC3 of ADC_VER_V5_V90 version have a LL_ADC_OVS_RATIO_x contant (other a 9bit value). Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
Francois Ramu
Christopher Friedt
parent
41bfec7c52
commit
0af4a393ee
1 changed files with 62 additions and 56 deletions
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@ -319,6 +319,60 @@ static void adc_stm32_calib(const struct device *dev)
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}
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#endif
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#if defined(CONFIG_SOC_SERIES_STM32G0X) || \
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defined(CONFIG_SOC_SERIES_STM32G4X) || \
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defined(CONFIG_SOC_SERIES_STM32H7X) || \
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defined(CONFIG_SOC_SERIES_STM32L0X) || \
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defined(CONFIG_SOC_SERIES_STM32L4X) || \
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defined(CONFIG_SOC_SERIES_STM32L5X) || \
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defined(CONFIG_SOC_SERIES_STM32WBX) || \
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defined(CONFIG_SOC_SERIES_STM32WLX)
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#ifdef LL_ADC_OVS_RATIO_2
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/* table for shifting oversampling mostly for ADC3 != ADC_VER_V5_V90 */
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static const uint32_t stm32_adc_ratio_table[] = {
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0,
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LL_ADC_OVS_RATIO_2,
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LL_ADC_OVS_RATIO_4,
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LL_ADC_OVS_RATIO_8,
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LL_ADC_OVS_RATIO_16,
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LL_ADC_OVS_RATIO_32,
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LL_ADC_OVS_RATIO_64,
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LL_ADC_OVS_RATIO_128,
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LL_ADC_OVS_RATIO_256,
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};
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#endif /* ! ADC_VER_V5_V90 */
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/*
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* Function to configure the oversampling ratio and shit using stm32 LL
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* ratio is directly the sequence->oversampling (a 2^n value)
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* shift is the corresponding LL_ADC_OVS_SHIFT_RIGHT_x constant
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*/
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static void adc_stm32_oversampling(ADC_TypeDef *adc, uint8_t ratio, uint32_t shift)
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{
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LL_ADC_SetOverSamplingScope(adc, LL_ADC_OVS_GRP_REGULAR_CONTINUED);
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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/*
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* Set bits manually to circumvent bug in LL Libraries
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* https://github.com/STMicroelectronics/STM32CubeH7/issues/177
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*/
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#if defined(ADC_VER_V5_V90)
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if (adc == ADC3) {
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MODIFY_REG(adc->CFGR2, (ADC_CFGR2_OVSS | ADC3_CFGR2_OVSR),
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(shift | stm32_adc_ratio_table[ratio]));
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} else {
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MODIFY_REG(adc->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OVSR),
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(shift | (((1UL << ratio) - 1) << ADC_CFGR2_OVSR_Pos)));
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}
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#endif /* ADC_VER_V5_V90*/
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MODIFY_REG(adc->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OVSR),
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(shift | (((1UL << ratio) - 1) << ADC_CFGR2_OVSR_Pos)));
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#else /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_ConfigOverSamplingRatioShift(adc, stm32_adc_ratio_table[ratio], shift);
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#endif /* CONFIG_SOC_SERIES_STM32H7X */
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}
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#endif /* CONFIG_SOC_SERIES_STM32xxx */
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static int start_read(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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@ -450,76 +504,28 @@ static int start_read(const struct device *dev,
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LL_ADC_SetOverSamplingScope(adc, LL_ADC_OVS_DISABLE);
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break;
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case 1:
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LL_ADC_SetOverSamplingScope(adc, LL_ADC_OVS_GRP_REGULAR_CONTINUED);
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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LL_ADC_ConfigOverSamplingRatioShift(adc, sequence->oversampling,
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#else /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_ConfigOverSamplingRatioShift(adc, LL_ADC_OVS_RATIO_2,
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#endif /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_OVS_SHIFT_RIGHT_1);
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adc_stm32_oversampling(adc, 1, LL_ADC_OVS_SHIFT_RIGHT_1);
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break;
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case 2:
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LL_ADC_SetOverSamplingScope(adc, LL_ADC_OVS_GRP_REGULAR_CONTINUED);
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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LL_ADC_ConfigOverSamplingRatioShift(adc, sequence->oversampling,
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#else /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_ConfigOverSamplingRatioShift(adc, LL_ADC_OVS_RATIO_4,
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#endif /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_OVS_SHIFT_RIGHT_2);
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adc_stm32_oversampling(adc, 2, LL_ADC_OVS_SHIFT_RIGHT_2);
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break;
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case 3:
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LL_ADC_SetOverSamplingScope(adc, LL_ADC_OVS_GRP_REGULAR_CONTINUED);
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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LL_ADC_ConfigOverSamplingRatioShift(adc, sequence->oversampling,
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#else /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_ConfigOverSamplingRatioShift(adc, LL_ADC_OVS_RATIO_8,
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#endif /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_OVS_SHIFT_RIGHT_3);
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adc_stm32_oversampling(adc, 3, LL_ADC_OVS_SHIFT_RIGHT_3);
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break;
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case 4:
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LL_ADC_SetOverSamplingScope(adc, LL_ADC_OVS_GRP_REGULAR_CONTINUED);
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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LL_ADC_ConfigOverSamplingRatioShift(adc, sequence->oversampling,
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#else /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_ConfigOverSamplingRatioShift(adc, LL_ADC_OVS_RATIO_16,
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#endif /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_OVS_SHIFT_RIGHT_4);
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adc_stm32_oversampling(adc, 4, LL_ADC_OVS_SHIFT_RIGHT_4);
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break;
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case 5:
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LL_ADC_SetOverSamplingScope(adc, LL_ADC_OVS_GRP_REGULAR_CONTINUED);
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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LL_ADC_ConfigOverSamplingRatioShift(adc, sequence->oversampling,
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#else /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_ConfigOverSamplingRatioShift(adc, LL_ADC_OVS_RATIO_32,
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#endif /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_OVS_SHIFT_RIGHT_5);
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adc_stm32_oversampling(adc, 5, LL_ADC_OVS_SHIFT_RIGHT_5);
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break;
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case 6:
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LL_ADC_SetOverSamplingScope(adc, LL_ADC_OVS_GRP_REGULAR_CONTINUED);
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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LL_ADC_ConfigOverSamplingRatioShift(adc, sequence->oversampling,
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#else /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_ConfigOverSamplingRatioShift(adc, LL_ADC_OVS_RATIO_64,
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#endif /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_OVS_SHIFT_RIGHT_6);
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adc_stm32_oversampling(adc, 6, LL_ADC_OVS_SHIFT_RIGHT_6);
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break;
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case 7:
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LL_ADC_SetOverSamplingScope(adc, LL_ADC_OVS_GRP_REGULAR_CONTINUED);
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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LL_ADC_ConfigOverSamplingRatioShift(adc, sequence->oversampling,
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#else
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LL_ADC_ConfigOverSamplingRatioShift(adc, LL_ADC_OVS_RATIO_128,
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#endif /* CONFIG_SOC_SERIES_STM32H7X */
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LL_ADC_OVS_SHIFT_RIGHT_7);
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adc_stm32_oversampling(adc, 7, LL_ADC_OVS_SHIFT_RIGHT_7);
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break;
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case 8:
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LL_ADC_SetOverSamplingScope(adc, LL_ADC_OVS_GRP_REGULAR_CONTINUED);
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#if defined(CONFIG_SOC_SERIES_STM32H7X)
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LL_ADC_ConfigOverSamplingRatioShift(adc, sequence->oversampling,
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#else
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LL_ADC_ConfigOverSamplingRatioShift(adc, LL_ADC_OVS_RATIO_256,
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#endif
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LL_ADC_OVS_SHIFT_RIGHT_8);
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adc_stm32_oversampling(adc, 8, LL_ADC_OVS_SHIFT_RIGHT_8);
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break;
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default:
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LOG_ERR("Invalid oversampling");
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