boards: mimxrt10xx: Added support for LPSPI DMA on RT10xx series

Add support for LPSPI DMA mode on RT1064, RT1060, RT1050, RT1024,
RT1020, RT1015, and RT1010 evaluation boards. Update tests to match.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2021-11-01 14:56:56 -05:00 committed by David Leach
commit 0aeb69ee8c
14 changed files with 44 additions and 0 deletions

View file

@ -67,6 +67,9 @@ arduino_serial: &lpuart1 {};
&lpspi1 {
status = "okay";
/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
dmas = <&edma0 0 13>, <&edma0 1 14>;
dma-names = "rx", "tx";
};
zephyr_udc0: &usb1 {

View file

@ -96,6 +96,9 @@ arduino_serial: &lpuart4 {};
&lpspi1 {
status = "okay";
/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
dmas = <&edma0 0 13>, <&edma0 1 14>;
dma-names = "rx", "tx";
};
zephyr_udc0: &usb1 {

View file

@ -140,6 +140,9 @@ arduino_serial: &lpuart2 {};
&lpspi1 {
status = "okay";
/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
dmas = <&edma0 0 13>, <&edma0 1 14>;
dma-names = "rx", "tx";
};
&enet {

View file

@ -119,6 +119,9 @@
&lpspi1 {
status = "okay";
/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
dmas = <&edma0 0 13>, <&edma0 1 14>;
dma-names = "rx", "tx";
};
&adc1 {

View file

@ -194,10 +194,16 @@ arduino_serial: &lpuart3 {};
&lpspi1 {
status = "okay";
/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
dmas = <&edma0 0 13>, <&edma0 1 14>;
dma-names = "rx", "tx";
};
&lpspi3 {
status = "okay";
/* DMA channels 2 and 3, muxed to LPSPI3 RX and TX */
dmas = <&edma0 2 15>, <&edma0 3 16>;
dma-names = "rx", "tx";
};
&enet {

View file

@ -203,8 +203,14 @@ zephyr_udc0: &usb1 {
&lpspi1 {
status = "okay";
/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
dmas = <&edma0 0 13>, <&edma0 1 14>;
dma-names = "rx", "tx";
};
&lpspi3 {
status = "okay";
/* DMA channels 2 and 3, muxed to LPSPI3 RX and TX */
dmas = <&edma0 2 15>, <&edma0 3 16>;
dma-names = "rx", "tx";
};

View file

@ -250,10 +250,16 @@ zephyr_udc0: &usb1 {
&lpspi1 {
status = "okay";
/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
dmas = <&edma0 0 13>, <&edma0 1 14>;
dma-names = "rx", "tx";
};
&lpspi3 {
status = "okay";
/* DMA channels 2 and 3, muxed to LPSPI3 RX and TX */
dmas = <&edma0 2 15>, <&edma0 3 16>;
dma-names = "rx", "tx";
};
&adc1 {

View file

@ -5,3 +5,5 @@
#
CONFIG_SPI_LOOPBACK_DRV_NAME="SPI_1"
CONFIG_SPI_MCUX_LPSPI_DMA=y
CONFIG_SPI_ASYNC=n

View file

@ -5,3 +5,5 @@
#
CONFIG_SPI_LOOPBACK_DRV_NAME="SPI_1"
CONFIG_SPI_MCUX_LPSPI_DMA=y
CONFIG_SPI_ASYNC=n

View file

@ -5,3 +5,5 @@
#
CONFIG_SPI_LOOPBACK_DRV_NAME="SPI_1"
CONFIG_SPI_MCUX_LPSPI_DMA=y
CONFIG_SPI_ASYNC=n

View file

@ -5,3 +5,5 @@
#
CONFIG_SPI_LOOPBACK_DRV_NAME="SPI_1"
CONFIG_SPI_MCUX_LPSPI_DMA=y
CONFIG_SPI_ASYNC=n

View file

@ -5,3 +5,5 @@
#
CONFIG_SPI_LOOPBACK_DRV_NAME="SPI_1"
CONFIG_SPI_MCUX_LPSPI_DMA=y
CONFIG_SPI_ASYNC=n

View file

@ -5,3 +5,5 @@
#
CONFIG_SPI_LOOPBACK_DRV_NAME="SPI_1"
CONFIG_SPI_MCUX_LPSPI_DMA=y
CONFIG_SPI_ASYNC=n

View file

@ -5,3 +5,5 @@
#
CONFIG_SPI_LOOPBACK_DRV_NAME="SPI_1"
CONFIG_SPI_MCUX_LPSPI_DMA=y
CONFIG_SPI_ASYNC=n