diff --git a/drivers/pwm/pwm_gd32.c b/drivers/pwm/pwm_gd32.c index f155d3e4f55..9c5db048463 100644 --- a/drivers/pwm/pwm_gd32.c +++ b/drivers/pwm/pwm_gd32.c @@ -16,6 +16,7 @@ #include #include + LOG_MODULE_REGISTER(pwm_gd32, CONFIG_PWM_LOG_LEVEL); /** PWM data. */ diff --git a/drivers/pwm/pwm_gecko.c b/drivers/pwm/pwm_gecko.c index d4c9a594f4a..cb216d6cbb8 100644 --- a/drivers/pwm/pwm_gecko.c +++ b/drivers/pwm/pwm_gecko.c @@ -74,7 +74,7 @@ static int pwm_gecko_get_cycles_per_sec(const struct device *dev, static const struct pwm_driver_api pwm_gecko_driver_api = { .set_cycles = pwm_gecko_set_cycles, - .get_cycles_per_sec = pwm_gecko_get_cycles_per_sec + .get_cycles_per_sec = pwm_gecko_get_cycles_per_sec, }; static int pwm_gecko_init(const struct device *dev) diff --git a/drivers/pwm/pwm_imx.c b/drivers/pwm/pwm_imx.c index 9d3678dab07..46352c0d63a 100644 --- a/drivers/pwm/pwm_imx.c +++ b/drivers/pwm/pwm_imx.c @@ -11,6 +11,7 @@ #include #include + LOG_MODULE_REGISTER(pwm_imx, CONFIG_PWM_LOG_LEVEL); #define PWM_PWMSR_FIFOAV_4WORDS 0x4 diff --git a/drivers/pwm/pwm_ite_it8xxx2.c b/drivers/pwm/pwm_ite_it8xxx2.c index a0bfb9f9a4b..84b75324a3d 100644 --- a/drivers/pwm/pwm_ite_it8xxx2.c +++ b/drivers/pwm/pwm_ite_it8xxx2.c @@ -17,6 +17,7 @@ #include #include + LOG_MODULE_REGISTER(pwm_ite_it8xxx2, CONFIG_PWM_LOG_LEVEL); #define PWM_CTRX_MIN 100 diff --git a/drivers/pwm/pwm_mchp_xec.c b/drivers/pwm/pwm_mchp_xec.c index 6c0cec096aa..1d368ac6c96 100644 --- a/drivers/pwm/pwm_mchp_xec.c +++ b/drivers/pwm/pwm_mchp_xec.c @@ -84,7 +84,7 @@ static const uint32_t max_freq_high_on_div[NUM_DIV_ELEMS] = { 3692307, 3428571, 3200000, - 3000000 + 3000000, }; static const uint32_t max_freq_low_on_div[NUM_DIV_ELEMS] = { @@ -103,7 +103,7 @@ static const uint32_t max_freq_low_on_div[NUM_DIV_ELEMS] = { 7692, 7142, 6666, - 6250 + 6250, }; static uint32_t xec_compute_frequency(uint32_t clk, uint32_t on, uint32_t off) diff --git a/drivers/pwm/pwm_mcux.c b/drivers/pwm/pwm_mcux.c index 543157889d3..529fd8020a3 100644 --- a/drivers/pwm/pwm_mcux.c +++ b/drivers/pwm/pwm_mcux.c @@ -14,6 +14,7 @@ #include #include + LOG_MODULE_REGISTER(pwm_mcux, CONFIG_PWM_LOG_LEVEL); #define CHANNEL_COUNT 2 diff --git a/drivers/pwm/pwm_mcux_ftm.c b/drivers/pwm/pwm_mcux_ftm.c index aa69ea9fcd6..3a56c09d5ef 100644 --- a/drivers/pwm/pwm_mcux_ftm.c +++ b/drivers/pwm/pwm_mcux_ftm.c @@ -16,6 +16,7 @@ #include #include + LOG_MODULE_REGISTER(pwm_mcux_ftm, CONFIG_PWM_LOG_LEVEL); #define MAX_CHANNELS ARRAY_SIZE(FTM0->CONTROLS) diff --git a/drivers/pwm/pwm_mcux_pwt.c b/drivers/pwm/pwm_mcux_pwt.c index 5beec23d890..638fc06db23 100644 --- a/drivers/pwm/pwm_mcux_pwt.c +++ b/drivers/pwm/pwm_mcux_pwt.c @@ -15,6 +15,7 @@ #include #include + LOG_MODULE_REGISTER(pwm_mcux_pwt, CONFIG_PWM_LOG_LEVEL); /* Number of PWT input ports */ diff --git a/drivers/pwm/pwm_mcux_sctimer.c b/drivers/pwm/pwm_mcux_sctimer.c index ab2436c9a4b..b6fbda556cc 100644 --- a/drivers/pwm/pwm_mcux_sctimer.c +++ b/drivers/pwm/pwm_mcux_sctimer.c @@ -16,6 +16,7 @@ #endif #include + LOG_MODULE_REGISTER(pwm_mcux_sctimer, CONFIG_PWM_LOG_LEVEL); #define CHANNEL_COUNT FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS diff --git a/drivers/pwm/pwm_mcux_tpm.c b/drivers/pwm/pwm_mcux_tpm.c index baff9499710..7d26575ffbe 100644 --- a/drivers/pwm/pwm_mcux_tpm.c +++ b/drivers/pwm/pwm_mcux_tpm.c @@ -19,6 +19,7 @@ #include #include + LOG_MODULE_REGISTER(pwm_mcux_tpm, CONFIG_PWM_LOG_LEVEL); #define MAX_CHANNELS ARRAY_SIZE(TPM0->CONTROLS) diff --git a/drivers/pwm/pwm_npcx.c b/drivers/pwm/pwm_npcx.c index 126721d0677..05193cdde3c 100644 --- a/drivers/pwm/pwm_npcx.c +++ b/drivers/pwm/pwm_npcx.c @@ -14,6 +14,7 @@ #include #include + LOG_MODULE_REGISTER(pwm_npcx, LOG_LEVEL_ERR); /* 16-bit period cycles/prescaler in NPCX PWM modules */ diff --git a/drivers/pwm/pwm_nrf5_sw.c b/drivers/pwm/pwm_nrf5_sw.c index 30c763cfb4c..851aab36d23 100644 --- a/drivers/pwm/pwm_nrf5_sw.c +++ b/drivers/pwm/pwm_nrf5_sw.c @@ -15,6 +15,7 @@ #include #include + LOG_MODULE_REGISTER(pwm_nrf5_sw, CONFIG_PWM_LOG_LEVEL); #define GENERATOR_NODE DT_INST_PHANDLE(0, generator) @@ -232,31 +233,31 @@ static int pwm_nrf5_sw_set_cycles(const struct device *dev, uint32_t channel, /* setup PPI */ if (USE_RTC) { NRF_PPI->CH[ppi_chs[0]].EEP = - (uint32_t) &(rtc->EVENTS_COMPARE[1 + channel]); + (uint32_t) &rtc->EVENTS_COMPARE[1 + channel]; NRF_PPI->CH[ppi_chs[0]].TEP = - (uint32_t) &(NRF_GPIOTE->TASKS_OUT[gpiote_ch]); + (uint32_t) &NRF_GPIOTE->TASKS_OUT[gpiote_ch]; NRF_PPI->CH[ppi_chs[1]].EEP = - (uint32_t) &(rtc->EVENTS_COMPARE[0]); + (uint32_t) &rtc->EVENTS_COMPARE[0]; NRF_PPI->CH[ppi_chs[1]].TEP = - (uint32_t) &(NRF_GPIOTE->TASKS_OUT[gpiote_ch]); + (uint32_t) &NRF_GPIOTE->TASKS_OUT[gpiote_ch]; #if defined(PPI_FEATURE_FORKS_PRESENT) NRF_PPI->FORK[ppi_chs[1]].TEP = - (uint32_t) &(rtc->TASKS_CLEAR); + (uint32_t) &rtc->TASKS_CLEAR; #else NRF_PPI->CH[ppi_chs[2]].EEP = - (uint32_t) &(rtc->EVENTS_COMPARE[0]); + (uint32_t) &rtc->EVENTS_COMPARE[0]; NRF_PPI->CH[ppi_chs[2]].TEP = - (uint32_t) &(rtc->TASKS_CLEAR); + (uint32_t) &rtc->TASKS_CLEAR; #endif } else { NRF_PPI->CH[ppi_chs[0]].EEP = - (uint32_t) &(timer->EVENTS_COMPARE[1 + channel]); + (uint32_t) &timer->EVENTS_COMPARE[1 + channel]; NRF_PPI->CH[ppi_chs[0]].TEP = - (uint32_t) &(NRF_GPIOTE->TASKS_OUT[gpiote_ch]); + (uint32_t) &NRF_GPIOTE->TASKS_OUT[gpiote_ch]; NRF_PPI->CH[ppi_chs[1]].EEP = - (uint32_t) &(timer->EVENTS_COMPARE[0]); + (uint32_t) &timer->EVENTS_COMPARE[0]; NRF_PPI->CH[ppi_chs[1]].TEP = - (uint32_t) &(NRF_GPIOTE->TASKS_OUT[gpiote_ch]); + (uint32_t) &NRF_GPIOTE->TASKS_OUT[gpiote_ch]; } NRF_PPI->CHENSET = ppi_mask; diff --git a/drivers/pwm/pwm_nrfx.c b/drivers/pwm/pwm_nrfx.c index dbb72bd880c..8bdb477c5c1 100644 --- a/drivers/pwm/pwm_nrfx.c +++ b/drivers/pwm/pwm_nrfx.c @@ -12,6 +12,7 @@ #include #include + LOG_MODULE_REGISTER(pwm_nrfx, CONFIG_PWM_LOG_LEVEL); #define PWM_NRFX_CH_POLARITY_MASK BIT(15) diff --git a/drivers/pwm/pwm_rv32m1_tpm.c b/drivers/pwm/pwm_rv32m1_tpm.c index 8144ef129bf..4048413cb2b 100644 --- a/drivers/pwm/pwm_rv32m1_tpm.c +++ b/drivers/pwm/pwm_rv32m1_tpm.c @@ -20,6 +20,7 @@ #endif #include + LOG_MODULE_REGISTER(pwm_rv32m1_tpm, CONFIG_PWM_LOG_LEVEL); #define MAX_CHANNELS ARRAY_SIZE(TPM0->CONTROLS) diff --git a/drivers/pwm/pwm_sam.c b/drivers/pwm/pwm_sam.c index 1606ce2ce9f..e11e819ac37 100644 --- a/drivers/pwm/pwm_sam.c +++ b/drivers/pwm/pwm_sam.c @@ -13,6 +13,7 @@ #include #include + LOG_MODULE_REGISTER(pwm_sam, CONFIG_PWM_LOG_LEVEL); struct sam_pwm_config { diff --git a/drivers/pwm/pwm_sifive.c b/drivers/pwm/pwm_sifive.c index aee7ec471ca..96aa64a6304 100644 --- a/drivers/pwm/pwm_sifive.c +++ b/drivers/pwm/pwm_sifive.c @@ -7,15 +7,14 @@ #define DT_DRV_COMPAT sifive_pwm0 #include - -LOG_MODULE_REGISTER(pwm_sifive, CONFIG_PWM_LOG_LEVEL); - #include #include #include #include #include +LOG_MODULE_REGISTER(pwm_sifive, CONFIG_PWM_LOG_LEVEL); + /* Macros */ #define PWM_REG(z_config, _offset) ((mem_addr_t) ((z_config)->base + _offset)) diff --git a/drivers/pwm/pwm_stm32.c b/drivers/pwm/pwm_stm32.c index 42c9d250aee..4d199ef13fb 100644 --- a/drivers/pwm/pwm_stm32.c +++ b/drivers/pwm/pwm_stm32.c @@ -22,6 +22,7 @@ #include #include + LOG_MODULE_REGISTER(pwm_stm32, CONFIG_PWM_LOG_LEVEL); /* L0 series MCUs only have 16-bit timers and don't have below macro defined */ diff --git a/drivers/pwm/pwm_xlnx_axi_timer.c b/drivers/pwm/pwm_xlnx_axi_timer.c index eca64efd3d6..dbc3b73f7a1 100644 --- a/drivers/pwm/pwm_xlnx_axi_timer.c +++ b/drivers/pwm/pwm_xlnx_axi_timer.c @@ -10,6 +10,7 @@ #include #include #include + LOG_MODULE_REGISTER(xlnx_axi_timer_pwm, CONFIG_PWM_LOG_LEVEL); /* AXI Timer v2.0 registers offsets (See Xilinx PG079 for details) */