drivers: i2c: enable I2C on STM32WB
Enable I2C on STM32WB Signed-off-by: Roger N'Guessan <roger.nguessan@st.com>
This commit is contained in:
parent
3df5ae68a7
commit
0a9d547cc1
5 changed files with 32 additions and 3 deletions
|
@ -83,5 +83,24 @@
|
|||
#define DT_FLASH_DEV_BASE_ADDRESS DT_ST_STM32WB_FLASH_CONTROLLER_58004000_BASE_ADDRESS
|
||||
#define DT_FLASH_DEV_NAME DT_ST_STM32WB_FLASH_CONTROLLER_58004000_LABEL
|
||||
|
||||
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
|
||||
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V2_40005400_LABEL
|
||||
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT
|
||||
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V2_40005400_IRQ_ERROR
|
||||
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
|
||||
#define DT_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V2_40005400_CLOCK_BITS
|
||||
#define DT_I2C_1_CLOCK_BUS DT_ST_STM32_I2C_V2_40005400_CLOCK_BUS
|
||||
|
||||
#define DT_I2C_3_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
|
||||
#define DT_I2C_3_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
|
||||
#define DT_I2C_3_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR_PRIORITY
|
||||
#define CONFIG_I2C_3_NAME DT_ST_STM32_I2C_V2_40005C00_LABEL
|
||||
#define DT_I2C_3_EVENT_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_EVENT
|
||||
#define DT_I2C_3_ERROR_IRQ DT_ST_STM32_I2C_V2_40005C00_IRQ_ERROR
|
||||
#define DT_I2C_3_BITRATE DT_ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
|
||||
#define DT_I2C_3_CLOCK_BITS DT_ST_STM32_I2C_V2_40005C00_CLOCK_BITS
|
||||
#define DT_I2C_3_CLOCK_BUS DT_ST_STM32_I2C_V2_40005C00_CLOCK_BUS
|
||||
|
||||
/* End of SoC Level DTS fixup file */
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue