diff --git a/boards/arm/stm32_min_dev/stm32_min_dev.dtsi b/boards/arm/stm32_min_dev/stm32_min_dev.dtsi index 61926fd86ae..17c9939a203 100644 --- a/boards/arm/stm32_min_dev/stm32_min_dev.dtsi +++ b/boards/arm/stm32_min_dev/stm32_min_dev.dtsi @@ -33,6 +33,25 @@ }; }; +&clk_hse { + clock-frequency = ; + status = "okay"; +}; + +&pll { + mul = <9>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <2>; + apb2-prescaler = <1>; +}; + &usart1 { pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>; current-speed = <115200>; diff --git a/boards/arm/stm32_min_dev/stm32_min_dev_black_defconfig b/boards/arm/stm32_min_dev/stm32_min_dev_black_defconfig index f584392ba22..521e9ae4bc4 100644 --- a/boards/arm/stm32_min_dev/stm32_min_dev_black_defconfig +++ b/boards/arm/stm32_min_dev/stm32_min_dev_black_defconfig @@ -8,9 +8,6 @@ CONFIG_SOC_SERIES_STM32F1X=y CONFIG_SOC_STM32F103X8=y -# 72MHz system clock -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 - # Enable MPU CONFIG_ARM_MPU=y @@ -30,17 +27,5 @@ CONFIG_PINMUX=y # enable GPIO CONFIG_GPIO=y -# clock configuration +# enable clock control CONFIG_CLOCK_CONTROL=y -CONFIG_CLOCK_STM32_HSE_CLOCK=8000000 -CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y - -# use HSE as PLL input -CONFIG_CLOCK_STM32_PLL_SRC_HSE=y -# produce 72MHz clock at PLL output -CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9 -CONFIG_CLOCK_STM32_AHB_PRESCALER=1 - -# APB1 clock must not exceed 36MHz limit -CONFIG_CLOCK_STM32_APB1_PRESCALER=2 -CONFIG_CLOCK_STM32_APB2_PRESCALER=1 diff --git a/boards/arm/stm32_min_dev/stm32_min_dev_blue_defconfig b/boards/arm/stm32_min_dev/stm32_min_dev_blue_defconfig index 83f87413833..a26346cd9be 100644 --- a/boards/arm/stm32_min_dev/stm32_min_dev_blue_defconfig +++ b/boards/arm/stm32_min_dev/stm32_min_dev_blue_defconfig @@ -3,9 +3,6 @@ CONFIG_SOC_SERIES_STM32F1X=y CONFIG_SOC_STM32F103X8=y -# 72MHz system clock -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 - # Enable MPU CONFIG_ARM_MPU=y @@ -25,17 +22,5 @@ CONFIG_PINMUX=y # enable GPIO CONFIG_GPIO=y -# clock configuration +# enable clock control CONFIG_CLOCK_CONTROL=y -CONFIG_CLOCK_STM32_HSE_CLOCK=8000000 -CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y - -# use HSE as PLL input -CONFIG_CLOCK_STM32_PLL_SRC_HSE=y -# produce 72MHz clock at PLL output -CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9 -CONFIG_CLOCK_STM32_AHB_PRESCALER=1 - -# APB1 clock must not exceed 36MHz limit -CONFIG_CLOCK_STM32_APB1_PRESCALER=2 -CONFIG_CLOCK_STM32_APB2_PRESCALER=1