From 0a3fa97fbe82610f292515efdec7b10b1e053b88 Mon Sep 17 00:00:00 2001
From: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Date: Wed, 7 Oct 2020 09:40:33 +0200
Subject: [PATCH] cavs: fix shim register location on 1.8 and above

Shim register location on cAVS 1.5 is different than on 1.8 and up,
fix it.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
---
 soc/xtensa/intel_adsp/common/include/soc.h | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/soc/xtensa/intel_adsp/common/include/soc.h b/soc/xtensa/intel_adsp/common/include/soc.h
index 0cfbf0815c6..4fc9b6c7df0 100644
--- a/soc/xtensa/intel_adsp/common/include/soc.h
+++ b/soc/xtensa/intel_adsp/common/include/soc.h
@@ -7,6 +7,8 @@
 #include <string.h>
 #include <errno.h>
 
+#include <cavs/version.h>
+
 #include <sys/sys_io.h>
 
 #include <adsp/cache.h>
@@ -61,10 +63,14 @@
 #define SSP_MN_DIV_BASE(x)			\
 	(0x00078D00 + ((x) * SSP_MN_DIV_SIZE))
 
-#define PDM_BASE				0x00010000
+#define PDM_BASE				DMIC_BASE
 
 /* SOC DSP SHIM Registers */
+#if CAVS_VERSION == CAVS_VERSION_1_5
 #define SOC_DSP_SHIM_REG_BASE			0x00001000
+#else
+#define SOC_DSP_SHIM_REG_BASE			0x00071f00
+#endif
 
 /* SOC DSP SHIM Register - Clock Control */
 #define SOC_CLKCTL_REQ_AUDIO_PLL_CLK		BIT(31)