arch: arm: introduce dependencies for CPU_CORTEX_M_HAS_SPLIM option
This commit introduces additional dependencies and selection scheme for CPU_CORTEX_M_HAS_SPLIM, for Zephyr Non-Secure builds on ARMv8-M MCUs with Security Extensions. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
parent
13dc376240
commit
0a2dcaaf8f
2 changed files with 7 additions and 4 deletions
|
@ -22,7 +22,7 @@ config CPU_CORTEX_M
|
||||||
select HAS_CMSIS
|
select HAS_CMSIS
|
||||||
select HAS_FLASH_LOAD_OFFSET
|
select HAS_FLASH_LOAD_OFFSET
|
||||||
select HAS_DTS
|
select HAS_DTS
|
||||||
select ARCH_HAS_STACK_PROTECTION if ARM_CORE_MPU
|
select ARCH_HAS_STACK_PROTECTION if ARM_CORE_MPU || CPU_CORTEX_M_HAS_SPLIM
|
||||||
select ARCH_HAS_USERSPACE if ARM_CORE_MPU
|
select ARCH_HAS_USERSPACE if ARM_CORE_MPU
|
||||||
help
|
help
|
||||||
This option signifies the use of a CPU of the Cortex-M family.
|
This option signifies the use of a CPU of the Cortex-M family.
|
||||||
|
|
|
@ -135,7 +135,7 @@ config CPU_CORTEX_M_HAS_VTOR
|
||||||
config CPU_CORTEX_M_HAS_SPLIM
|
config CPU_CORTEX_M_HAS_SPLIM
|
||||||
bool
|
bool
|
||||||
# Omit prompt to signify "hidden" option
|
# Omit prompt to signify "hidden" option
|
||||||
depends on ARMV8_M_MAINLINE
|
depends on ARMV8_M_MAINLINE || (ARMV8_M_SE && !ARM_NONSECURE_FIRMWARE)
|
||||||
default n
|
default n
|
||||||
help
|
help
|
||||||
This option signifies the CPU has the MSPLIM, PSPLIM registers.
|
This option signifies the CPU has the MSPLIM, PSPLIM registers.
|
||||||
|
@ -145,8 +145,10 @@ config CPU_CORTEX_M_HAS_SPLIM
|
||||||
can descend. MSPLIM, PSPLIM are always present in ARMv8-M
|
can descend. MSPLIM, PSPLIM are always present in ARMv8-M
|
||||||
MCUs that implement the ARMv8-M Main Extension (Mainline).
|
MCUs that implement the ARMv8-M Main Extension (Mainline).
|
||||||
|
|
||||||
In an ARMv8-M implementation with the Security Extension, the
|
In an ARMv8-M Mainline implementation with the Security Extension
|
||||||
MSPLIM, PSPLIM registers have additional Secure instances.
|
the MSPLIM, PSPLIM registers have additional Secure instances.
|
||||||
|
In an ARMv8-M Baseline implementation with the Security Extension
|
||||||
|
the MSPLIM, PSPLIM registers have only Secure instances.
|
||||||
|
|
||||||
config CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS
|
config CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS
|
||||||
bool
|
bool
|
||||||
|
@ -246,6 +248,7 @@ config ARMV8_M_SE
|
||||||
bool
|
bool
|
||||||
# Omit prompt to signify "hidden" option
|
# Omit prompt to signify "hidden" option
|
||||||
depends on ARMV8_M_BASELINE || ARMV8_M_MAINLINE
|
depends on ARMV8_M_BASELINE || ARMV8_M_MAINLINE
|
||||||
|
select CPU_CORTEX_M_HAS_SPLIM if !ARM_NONSECURE_FIRMWARE
|
||||||
help
|
help
|
||||||
This option signifies the use of an ARMv8-M processor
|
This option signifies the use of an ARMv8-M processor
|
||||||
implementation (Baseline or Mainline) supporting the
|
implementation (Baseline or Mainline) supporting the
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue