tests: lwm2m: Add Qemu X86 and fix Qemu Cortex-M3

* Add support for running interoperability tests with
  Qemu X86.
* Remove some debugging messages to allow binary to
  fix Qemu Cortex-M3 board.
* Tune buffer and stack sizes to fit all boards.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
This commit is contained in:
Seppo Takalo 2023-10-20 10:10:28 +03:00 committed by Carles Cufí
commit 0a104185fe
7 changed files with 96 additions and 42 deletions

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@ -1 +1,5 @@
CONFIG_FPU=y
CONFIG_NET_L2_ETHERNET=y
CONFIG_NET_QEMU_ETHERNET=y
CONFIG_PCIE=y

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@ -5,3 +5,4 @@ CONFIG_LWM2M_DNS_SUPPORT=y
CONFIG_NET_CONFIG_MY_IPV4_GW="192.0.2.2"
CONFIG_NATIVE_POSIX_SLOWDOWN_TO_REAL_TIME=y
CONFIG_NATIVE_UART_0_ON_STDINOUT=y
CONFIG_ASAN=y

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@ -5,16 +5,14 @@ CONFIG_NET_QEMU_ETHERNET=y
# RAM/ROM tuning
CONFIG_IDLE_STACK_SIZE=128
CONFIG_MBEDTLS_HEAP_SIZE=7000
CONFIG_ISR_STACK_SIZE=512
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=1024
CONFIG_LWM2M_ENGINE_STACK_SIZE=2000
CONFIG_LWM2M_LOG_LEVEL_INF=y
CONFIG_LWM2M_ENGINE_MAX_MESSAGES=3
CONFIG_LWM2M_ENGINE_VALIDATION_BUFFER_SIZE=0
CONFIG_LWM2M_ENGINE_MAX_OBSERVER=5
CONFIG_LWM2M_SECURITY_DTLS_TLS_CIPHERSUITE_MAX=3
CONFIG_LWM2M_DEVICE_PWRSRC_MAX=2
CONFIG_LWM2M_DEVICE_ERROR_CODE_MAX=5
CONFIG_LWM2M_DEVICE_EXT_DEV_INFO_MAX=2
CONFIG_LWM2M_NUM_ATTR=10
CONFIG_LOG_BUFFER_SIZE=512
# qemu_cortex_m3 have smaller memory so simulate a small
# device and small network where max CoAP packet is 256+headers.
# This excercises the outgoing block-wise module intentionally.
CONFIG_LWM2M_COAP_MAX_MSG_SIZE=256
CONFIG_LWM2M_COAP_BLOCK_SIZE=256
CONFIG_LWM2M_COAP_BLOCK_TRANSFER=y
CONFIG_LWM2M_COAP_ENCODE_BUFFER_SIZE=2048

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@ -0,0 +1,4 @@
CONFIG_FPU=y
CONFIG_NET_L2_ETHERNET=y
CONFIG_NET_QEMU_ETHERNET=y
CONFIG_PCIE=y

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@ -1,36 +1,22 @@
CONFIG_NETWORKING=y
CONFIG_LOG=y
CONFIG_LWM2M_LOG_LEVEL_DBG=y
CONFIG_TEST_RANDOM_GENERATOR=y
CONFIG_NET_IPV6=y
CONFIG_NET_IF_UNICAST_IPV6_ADDR_COUNT=3
CONFIG_NET_IF_MCAST_IPV6_ADDR_COUNT=2
CONFIG_NET_IPV4=y
CONFIG_NET_IPV6=n
CONFIG_NET_DHCPV4=n
CONFIG_NET_IF_UNICAST_IPV4_ADDR_COUNT=3
CONFIG_NET_IF_MCAST_IPV4_ADDR_COUNT=2
CONFIG_PRINTK=y
CONFIG_NET_PKT_RX_COUNT=10
CONFIG_NET_PKT_TX_COUNT=10
CONFIG_NET_BUF_RX_COUNT=10
CONFIG_NET_BUF_TX_COUNT=10
CONFIG_NET_MAX_CONTEXTS=5
CONFIG_NET_CONFIG_MY_IPV6_ADDR="2001:db8::1"
CONFIG_NET_CONFIG_PEER_IPV6_ADDR="2001:db8::2"
CONFIG_NET_PKT_RX_COUNT=4
CONFIG_NET_PKT_TX_COUNT=4
CONFIG_NET_BUF_RX_COUNT=8
CONFIG_NET_BUF_TX_COUNT=8
CONFIG_NET_MAX_CONTEXTS=4
CONFIG_NET_CONFIG_MY_IPV4_ADDR="192.0.2.1"
CONFIG_NET_CONFIG_MY_IPV4_GW="192.0.2.2"
CONFIG_NET_LOG=y
CONFIG_NET_CONFIG_NEED_IPV6=y
CONFIG_NET_CONFIG_NEED_IPV4=y
CONFIG_NET_CONFIG_SETTINGS=y
CONFIG_LWM2M=y
CONFIG_LWM2M_COAP_BLOCK_SIZE=512
CONFIG_LWM2M_IPSO_SUPPORT=y
CONFIG_LWM2M_SHELL=y
CONFIG_LWM2M_ACCESS_CONTROL_ENABLE=n
#Enable Portfolio object
CONFIG_LWM2M_PORTFOLIO_OBJ_SUPPORT=y
@ -47,7 +33,7 @@ CONFIG_LWM2M_RW_SENML_JSON_SUPPORT=y
#Enable SenML CBOR content format
CONFIG_LWM2M_RW_SENML_CBOR_SUPPORT=y
CONFIG_LWM2M_RW_SENML_CBOR_RECORDS=60
CONFIG_LWM2M_RW_SENML_CBOR_RECORDS=40
CONFIG_ZCBOR_CANONICAL=y
#Enable legacy content formats
@ -62,7 +48,6 @@ CONFIG_COAP_EXTENDED_OPTIONS_LEN_VALUE=40
CONFIG_LWM2M_QUEUE_MODE_ENABLED=y
CONFIG_LWM2M_QUEUE_MODE_UPTIME=20
CONFIG_LWM2M_UPDATE_PERIOD=30
CONFIG_LWM2M_SECONDS_TO_UPDATE_EARLY=10
# LwM2M configuration as OMA-ETS-LightweightM2M_INT-V1_1-20190912-D Configuration 3
CONFIG_LWM2M_ENGINE_DEFAULT_LIFETIME=30
@ -74,19 +59,45 @@ CONFIG_MBEDTLS_TLS_VERSION_1_2=y
# Special MbedTLS changes
CONFIG_MBEDTLS_ENABLE_HEAP=y
CONFIG_MBEDTLS_HEAP_SIZE=8192
CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=1500
# MTU - IPv6 header - UDP header - DTLS header
# 1280 - 40 - 8 - 21
CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=1211
CONFIG_MBEDTLS_HEAP_SIZE=7168
CONFIG_MBEDTLS_CIPHER_CCM_ENABLED=y
# Disable RSA, we don't parse certs: saves flash/memory
CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_ENABLED=n
# Enable PSK instead
CONFIG_MBEDTLS_KEY_EXCHANGE_PSK_ENABLED=y
CONFIG_LWM2M_SECURITY_DTLS_TLS_CIPHERSUITE_MAX=3
CONFIG_NET_SOCKETS_SOCKOPT_TLS=y
CONFIG_NET_SOCKETS_TLS_MAX_CONTEXTS=4
# For testing purposes, limit DTLS contexts to one,
# LwM2M engine should not use more than one on any given time.
CONFIG_NET_SOCKETS_TLS_MAX_CONTEXTS=1
CONFIG_NET_SOCKETS_ENABLE_DTLS=y
# MbedTLS needs a larger stack
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048
# Assume that IPv6 minimum MTU is accepted
# MTU - IPv6 header - UDP header - DTLS header - CoAP header room
# 1280 - 40 - 8 - 21 - 48
CONFIG_LWM2M_COAP_MAX_MSG_SIZE=1163
CONFIG_LWM2M_COAP_BLOCK_SIZE=1024
CONFIG_LWM2M_COAP_BLOCK_TRANSFER=y
CONFIG_LWM2M_COAP_ENCODE_BUFFER_SIZE=4096
CONFIG_LWM2M_NUM_OUTPUT_BLOCK_CONTEXT=1
CONFIG_LWM2M_NUM_BLOCK1_CONTEXT=1
CONFIG_SYS_HASH_FUNC32=y
CONFIG_LWM2M_ENGINE_VALIDATION_BUFFER_SIZE=0
CONFIG_LWM2M_ENGINE_MAX_PENDING=2
CONFIG_LWM2M_ENGINE_MAX_REPLIES=2
CONFIG_LWM2M_ENGINE_MAX_MESSAGES=3
CONFIG_LWM2M_ENGINE_MAX_OBSERVER=5
CONFIG_LWM2M_DEVICE_PWRSRC_MAX=2
CONFIG_LWM2M_DEVICE_ERROR_CODE_MAX=2
CONFIG_LWM2M_DEVICE_EXT_DEV_INFO_MAX=2
CONFIG_LWM2M_NUM_ATTR=20
# Configure stack sizes
CONFIG_MAIN_STACK_SIZE=1024
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=512
CONFIG_SHELL_STACK_SIZE=1536
CONFIG_LWM2M_ENGINE_STACK_SIZE=2048

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@ -11,7 +11,6 @@
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(LOG_MODULE_NAME);
#include <stdlib.h>
#include <zephyr/drivers/hwinfo.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/sensor.h>
@ -28,15 +27,37 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME);
#define VERSION "1.2.3"
static struct lwm2m_ctx client;
static void rd_client_event(struct lwm2m_ctx *client,
enum lwm2m_rd_client_event client_event);
static void observe_cb(enum lwm2m_observe_event event,
struct lwm2m_obj_path *path, void *user_data);
static uint8_t bat_idx = LWM2M_DEVICE_PWR_SRC_TYPE_BAT_INT;
static int bat_mv = 3800;
static int bat_ma = 125;
static uint8_t usb_idx = LWM2M_DEVICE_PWR_SRC_TYPE_USB;
static int usb_mv = 5000;
static int usb_ma = 900;
static void reboot_handler(struct k_work *work)
{
/* I cannot really restart the client, as we don't know
* the endpoint name. Testcase sets that on a command line.
* So we only stop.
*/
lwm2m_rd_client_stop(&client, rd_client_event, true);
}
K_WORK_DEFINE(reboot_work, reboot_handler);
static int device_reboot_cb(uint16_t obj_inst_id,
uint8_t *args, uint16_t args_len)
{
LOG_INF("DEVICE: REBOOT");
k_work_submit(&reboot_work);
return 0;
}
static int lwm2m_setup(void)
{
/* setup DEVICE object */
@ -53,6 +74,20 @@ static int lwm2m_setup(void)
lwm2m_set_res_buf(&LWM2M_OBJ(3, 0, 17), CONFIG_BOARD, sizeof(CONFIG_BOARD),
sizeof(CONFIG_BOARD), LWM2M_RES_DATA_FLAG_RO);
/* add power source resource instances */
lwm2m_create_res_inst(&LWM2M_OBJ(3, 0, 6, 0));
lwm2m_set_res_buf(&LWM2M_OBJ(3, 0, 6, 0), &bat_idx, sizeof(bat_idx), sizeof(bat_idx), 0);
lwm2m_create_res_inst(&LWM2M_OBJ(3, 0, 7, 0));
lwm2m_set_res_buf(&LWM2M_OBJ(3, 0, 7, 0), &bat_mv, sizeof(bat_mv), sizeof(bat_mv), 0);
lwm2m_create_res_inst(&LWM2M_OBJ(3, 0, 8, 0));
lwm2m_set_res_buf(&LWM2M_OBJ(3, 0, 8, 0), &bat_ma, sizeof(bat_ma), sizeof(bat_ma), 0);
lwm2m_create_res_inst(&LWM2M_OBJ(3, 0, 6, 1));
lwm2m_set_res_buf(&LWM2M_OBJ(3, 0, 6, 1), &usb_idx, sizeof(usb_idx), sizeof(usb_idx), 0);
lwm2m_create_res_inst(&LWM2M_OBJ(3, 0, 7, 1));
lwm2m_set_res_buf(&LWM2M_OBJ(3, 0, 7, 1), &usb_mv, sizeof(usb_mv), sizeof(usb_mv), 0);
lwm2m_create_res_inst(&LWM2M_OBJ(3, 0, 8, 1));
lwm2m_set_res_buf(&LWM2M_OBJ(3, 0, 8, 1), &usb_ma, sizeof(usb_ma), sizeof(usb_ma), 0);
return 0;
}

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@ -8,6 +8,7 @@ tests:
platform_allow:
- native_posix
- qemu_cortex_m3
- qemu_x86
tags:
- testing
- pytest