drivers: cc13xx_cc26xx: use DT_INST_FOREACH to reduce code duplication
Use DT_INST_FOREACH macro to combine code used for multiple instances. Remove unnecessary Kconfig options for UART instances. Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
This commit is contained in:
parent
984988285b
commit
0915ccca46
3 changed files with 229 additions and 339 deletions
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@ -3,25 +3,10 @@
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# Copyright (c) 2019 Brett Witherspoon
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# SPDX-License-Identifier: Apache-2.0
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menuconfig UART_CC13XX_CC26XX
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config UART_CC13XX_CC26XX
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bool "TI SimpleLink CC13xx / CC26xx UART driver"
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depends on SOC_SERIES_CC13X2_CC26X2
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select SERIAL_HAS_DRIVER
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select SERIAL_SUPPORT_INTERRUPT
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help
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Enable the TI SimpleLink CC13xx / CC26xx UART driver.
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if UART_CC13XX_CC26XX
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config UART_CC13XX_CC26XX_0
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bool "UART 0"
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default y
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help
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Enable UART 0.
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config UART_CC13XX_CC26XX_1
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bool "UART 1"
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help
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Enable UART 1.
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endif # UART_CC13XX_CC26XX
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@ -40,14 +40,6 @@ struct uart_cc13xx_cc26xx_data {
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#endif
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};
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#ifdef CONFIG_UART_CC13XX_CC26XX_0
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DEVICE_DECLARE(uart_cc13xx_cc26xx_0);
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#endif /* CONFIG_UART_CC13XX_CC26XX_0 */
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#ifdef CONFIG_UART_CC13XX_CC26XX_1
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DEVICE_DECLARE(uart_cc13xx_cc26xx_1);
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#endif /* CONFIG_UART_CC13XX_CC26XX_1 */
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static inline struct uart_cc13xx_cc26xx_data *get_dev_data(struct device *dev)
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{
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return dev->driver_data;
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@ -498,210 +490,171 @@ static const struct uart_driver_api uart_cc13xx_cc26xx_driver_api = {
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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#ifdef CONFIG_UART_CC13XX_CC26XX_0
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static int uart_cc13xx_cc26xx_init_0(struct device *dev)
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{
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int ret;
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#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
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get_dev_data(dev)->pm_state = DEVICE_PM_ACTIVE_STATE;
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#endif
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#define UART_CC13XX_CC26XX_DOMAIN_0 PRCM_DOMAIN_SERIAL
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#define UART_CC13XX_CC26XX_DOMAIN_1 PRCM_DOMAIN_PERIPH
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#ifdef CONFIG_SYS_POWER_MANAGEMENT
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get_dev_data(dev)->rx_constrained = false;
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get_dev_data(dev)->tx_constrained = false;
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/* Set Power dependencies */
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Power_setDependency(PowerCC26XX_PERIPH_UART0);
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/* Register notification function */
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Power_registerNotify(&get_dev_data(dev)->postNotify,
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PowerCC26XX_AWAKE_STANDBY,
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postNotifyFxn, (uintptr_t)dev);
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#define UART_CC13XX_CC26XX_POWER_UART(n) \
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do { \
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get_dev_data(dev)->rx_constrained = false; \
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get_dev_data(dev)->tx_constrained = false; \
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\
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/* Set Power dependencies */ \
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Power_setDependency(PowerCC26XX_PERIPH_UART##n); \
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\
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/* Register notification function */ \
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Power_registerNotify(&get_dev_data(dev)->postNotify, \
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PowerCC26XX_AWAKE_STANDBY, \
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postNotifyFxn, (uintptr_t)dev); \
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} while (0)
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#else
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/* Enable UART power domain */
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PRCMPowerDomainOn(PRCM_DOMAIN_SERIAL);
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/* Enable UART peripherals */
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PRCMPeripheralRunEnable(PRCM_PERIPH_UART0);
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PRCMPeripheralSleepEnable(PRCM_PERIPH_UART0);
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/* Load PRCM settings */
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PRCMLoadSet();
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while (!PRCMLoadGet()) {
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continue;
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}
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/* UART should not be accessed until power domain is on. */
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while (PRCMPowerDomainStatus(PRCM_DOMAIN_SERIAL) !=
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PRCM_DOMAIN_POWER_ON) {
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continue;
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}
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#define UART_CC13XX_CC26XX_POWER_UART(n) \
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do { \
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/* Enable UART power domain */ \
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PRCMPowerDomainOn(UART_CC13XX_CC26XX_DOMAIN_##n); \
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\
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/* Enable UART peripherals */ \
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PRCMPeripheralRunEnable(PRCM_PERIPH_UART##n); \
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PRCMPeripheralSleepEnable(PRCM_PERIPH_UART##n); \
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\
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/* Load PRCM settings */ \
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PRCMLoadSet(); \
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while (!PRCMLoadGet()) { \
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continue; \
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} \
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\
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/* UART should not be accessed until power domain is on. */ \
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while (PRCMPowerDomainStatus( \
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UART_CC13XX_CC26XX_DOMAIN_##n) != \
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PRCM_DOMAIN_POWER_ON) { \
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continue; \
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} \
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} while (0)
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#endif
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/* Configure IOC module to map UART signals to pins */
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IOCPortConfigureSet(GET_PIN(0, tx_pin), GET_PORT(0, tx_pin),
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IOC_STD_OUTPUT);
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IOCPortConfigureSet(GET_PIN(0, rx_pin), GET_PORT(0, rx_pin),
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IOC_STD_INPUT);
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/* Configure and enable UART */
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ret = uart_cc13xx_cc26xx_configure(dev,
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&get_dev_data(dev)->uart_config);
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/* Enable interrupts */
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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UARTIntClear(get_dev_conf(dev)->regs, UART_INT_RX);
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#define UART_CC13XX_CC26XX_IRQ_CFG(n) \
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do { \
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UARTIntClear(get_dev_conf(dev)->regs, UART_INT_RX); \
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\
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IRQ_CONNECT(DT_INST_IRQN(n), \
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DT_INST_IRQ(n, priority), \
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uart_cc13xx_cc26xx_isr, \
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DEVICE_GET(uart_cc13xx_cc26xx_##n), \
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0); \
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irq_enable(DT_INST_IRQN(n)); \
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/* Causes an initial TX ready INT when TX INT enabled */\
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UARTCharPutNonBlocking(get_dev_conf(dev)->regs, '\0'); \
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} while (0)
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IRQ_CONNECT(DT_INST_IRQN(0),
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DT_INST_IRQ(0, priority),
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uart_cc13xx_cc26xx_isr, DEVICE_GET(uart_cc13xx_cc26xx_0),
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0);
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irq_enable(DT_INST_IRQN(0));
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/* Causes an initial TX ready interrupt when TX interrupt is enabled */
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UARTCharPutNonBlocking(get_dev_conf(dev)->regs, '\0');
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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return ret;
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}
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static const struct uart_device_config uart_cc13xx_cc26xx_config_0 = {
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.regs = DT_INST_REG_ADDR(0),
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.sys_clk_freq = DT_INST_PROP_BY_PHANDLE(0, clocks, clock_frequency)
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};
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static struct uart_cc13xx_cc26xx_data uart_cc13xx_cc26xx_data_0 = {
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.uart_config = {
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.baudrate = DT_PROP(DT_NODELABEL(uart0), current_speed),
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.parity = UART_CFG_PARITY_NONE,
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.stop_bits = UART_CFG_STOP_BITS_1,
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.data_bits = UART_CFG_DATA_BITS_8,
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.flow_ctrl = UART_CFG_FLOW_CTRL_NONE,
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},
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.callback = NULL,
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#define UART_CC13XX_CC26XX_INT_FIELDS \
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.callback = NULL, \
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.user_data = NULL,
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#else
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#define UART_CC13XX_CC26XX_IRQ_CFG(n)
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#define UART_CC13XX_CC26XX_INT_FIELDS
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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/*
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* DEVICE_DEFINE() requires the kernel level to be explicitly passed
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* using the actual macro name, hence we are forced to list these permutations
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* out.
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*/
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#define UART_CC13XX_CC26XX_DEVICE_DEFINE_0 \
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DEVICE_DEFINE(uart_cc13xx_cc26xx_0, DT_INST_LABEL(0), \
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uart_cc13xx_cc26xx_init_0, \
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uart_cc13xx_cc26xx_pm_control, \
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&uart_cc13xx_cc26xx_data_0, &uart_cc13xx_cc26xx_config_0,\
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&uart_cc13xx_cc26xx_driver_api)
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#define UART_CC13XX_CC26XX_DEVICE_DEFINE_1 \
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DEVICE_DEFINE(uart_cc13xx_cc26xx_1, DT_INST_LABEL(1), \
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uart_cc13xx_cc26xx_init_1, \
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uart_cc13xx_cc26xx_pm_control, \
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&uart_cc13xx_cc26xx_data_1, &uart_cc13xx_cc26xx_config_1,\
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&uart_cc13xx_cc26xx_driver_api)
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#define UART_CC13XX_CC26XX_DEVICE_API_INIT_0 \
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DEVICE_AND_API_INIT(uart_cc13xx_cc26xx_0, DT_INST_LABEL(0), \
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uart_cc13xx_cc26xx_init_0, &uart_cc13xx_cc26xx_data_0, \
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&uart_cc13xx_cc26xx_config_0, PRE_KERNEL_1, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&uart_cc13xx_cc26xx_driver_api)
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#define UART_CC13XX_CC26XX_DEVICE_API_INIT_1 \
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DEVICE_AND_API_INIT(uart_cc13xx_cc26xx_1, DT_INST_LABEL(1), \
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uart_cc13xx_cc26xx_init_1, &uart_cc13xx_cc26xx_data_1, \
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&uart_cc13xx_cc26xx_config_1, POST_KERNEL, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&uart_cc13xx_cc26xx_driver_api)
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#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
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DEVICE_DEFINE(uart_cc13xx_cc26xx_0, DT_INST_LABEL(0),
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uart_cc13xx_cc26xx_init_0,
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uart_cc13xx_cc26xx_pm_control,
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&uart_cc13xx_cc26xx_data_0, &uart_cc13xx_cc26xx_config_0,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_cc13xx_cc26xx_driver_api);
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#define UART_CC13XX_CC26XX_DEVICE_INIT(n) \
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UART_CC13XX_CC26XX_DEVICE_DEFINE_##n
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#define UART_CC13XX_CC26XX_INIT_PM_STATE \
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do { \
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get_dev_data(dev)->pm_state = DEVICE_PM_ACTIVE_STATE; \
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} while (0)
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#else
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DEVICE_AND_API_INIT(uart_cc13xx_cc26xx_0,
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DT_INST_LABEL(0),
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uart_cc13xx_cc26xx_init_0, &uart_cc13xx_cc26xx_data_0,
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&uart_cc13xx_cc26xx_config_0, PRE_KERNEL_1,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_cc13xx_cc26xx_driver_api);
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#endif
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#endif /* CONFIG_UART_CC13XX_CC26XX_0 */
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#define UART_CC13XX_CC26XX_DEVICE_INIT(n) \
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UART_CC13XX_CC26XX_DEVICE_API_INIT_##n
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#ifdef CONFIG_UART_CC13XX_CC26XX_1
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static int uart_cc13xx_cc26xx_init_1(struct device *dev)
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{
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int ret;
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#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
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get_dev_data(dev)->pm_state = DEVICE_PM_ACTIVE_STATE;
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#define UART_CC13XX_CC26XX_INIT_PM_STATE
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#endif
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#ifdef CONFIG_SYS_POWER_MANAGEMENT
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get_dev_data(dev)->rx_constrained = false;
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get_dev_data(dev)->tx_constrained = false;
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/* Set Power dependencies */
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Power_setDependency(PowerCC26XX_PERIPH_UART1);
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/* Register notification function */
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Power_registerNotify(&get_dev_data(dev)->postNotify,
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PowerCC26XX_AWAKE_STANDBY,
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postNotifyFxn, (uintptr_t)dev);
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#else
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/* Enable UART power domain */
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PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
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/* Enable UART peripherals */
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PRCMPeripheralRunEnable(PRCM_PERIPH_UART1);
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/* Load PRCM settings */
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PRCMLoadSet();
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while (!PRCMLoadGet()) {
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continue;
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#define UART_CC13XX_CC26XX_INIT_FUNC(n) \
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static int uart_cc13xx_cc26xx_init_##n(struct device *dev) \
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{ \
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int ret; \
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\
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UART_CC13XX_CC26XX_INIT_PM_STATE; \
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\
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UART_CC13XX_CC26XX_POWER_UART(n); \
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\
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/* Configure IOC module to map UART signals to pins */ \
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IOCPortConfigureSet(GET_PIN(n, tx_pin), GET_PORT(n, tx_pin),\
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IOC_STD_OUTPUT); \
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IOCPortConfigureSet(GET_PIN(n, rx_pin), GET_PORT(n, rx_pin),\
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IOC_STD_INPUT); \
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\
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/* Configure and enable UART */ \
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ret = uart_cc13xx_cc26xx_configure(dev, \
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&get_dev_data(dev)->uart_config); \
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\
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/* Enable interrupts */ \
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UART_CC13XX_CC26XX_IRQ_CFG(n); \
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\
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return ret; \
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}
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/* UART should not be accessed until power domain is on. */
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while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) !=
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PRCM_DOMAIN_POWER_ON) {
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continue;
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}
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#endif
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/* Configure IOC module to map UART signals to pins */
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IOCPortConfigureSet(GET_PIN(1, tx_pin), GET_PORT(1, tx_pin),
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IOC_STD_OUTPUT);
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IOCPortConfigureSet(GET_PIN(1, rx_pin), GET_PORT(1, rx_pin),
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IOC_STD_INPUT);
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#define UART_CC13XX_CC26XX_INIT(n) \
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DEVICE_DECLARE(uart_cc13xx_cc26xx_##n); \
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\
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UART_CC13XX_CC26XX_INIT_FUNC(n); \
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\
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static const struct uart_device_config \
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uart_cc13xx_cc26xx_config_##n = { \
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.regs = DT_INST_REG_ADDR(n), \
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.sys_clk_freq = DT_INST_PROP_BY_PHANDLE(n, clocks, \
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clock_frequency) \
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}; \
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\
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static struct uart_cc13xx_cc26xx_data \
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uart_cc13xx_cc26xx_data_##n = { \
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.uart_config = { \
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.baudrate = DT_INST_PROP(n, current_speed), \
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.parity = UART_CFG_PARITY_NONE, \
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.stop_bits = UART_CFG_STOP_BITS_1, \
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.data_bits = UART_CFG_DATA_BITS_8, \
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.flow_ctrl = UART_CFG_FLOW_CTRL_NONE, \
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}, \
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UART_CC13XX_CC26XX_INT_FIELDS \
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}; \
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\
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UART_CC13XX_CC26XX_DEVICE_INIT(n)
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/* Configure and enable UART */
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ret = uart_cc13xx_cc26xx_configure(dev,
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&get_dev_data(dev)->uart_config);
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/* Enable interrupts */
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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UARTIntClear(get_dev_conf(dev)->regs, UART_INT_RX);
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IRQ_CONNECT(DT_INST_IRQN(1),
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DT_INST_IRQ(1, priority),
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uart_cc13xx_cc26xx_isr, DEVICE_GET(uart_cc13xx_cc26xx_1),
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0);
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irq_enable(DT_INST_IRQN(1));
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/* Causes an initial TX ready interrupt when TX interrupt is enabled */
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UARTCharPutNonBlocking(get_dev_conf(dev)->regs, '\0');
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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return ret;
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}
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static const struct uart_device_config uart_cc13xx_cc26xx_config_1 = {
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.regs = DT_INST_REG_ADDR(1),
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.sys_clk_freq = DT_INST_PROP_BY_PHANDLE(1, clocks, clock_frequency)
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};
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static struct uart_cc13xx_cc26xx_data uart_cc13xx_cc26xx_data_1 = {
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.uart_config = {
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.baudrate = DT_PROP(DT_NODELABEL(uart1), current_speed),
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.parity = UART_CFG_PARITY_NONE,
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.stop_bits = UART_CFG_STOP_BITS_1,
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.data_bits = UART_CFG_DATA_BITS_8,
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.flow_ctrl = UART_CFG_FLOW_CTRL_NONE,
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},
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.callback = NULL,
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.user_data = NULL,
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
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DEVICE_DEFINE(uart_cc13xx_cc26xx_1, DT_INST_LABEL(1),
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uart_cc13xx_cc26xx_init_1,
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uart_cc13xx_cc26xx_pm_control,
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&uart_cc13xx_cc26xx_data_1, &uart_cc13xx_cc26xx_config_1,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_cc13xx_cc26xx_driver_api);
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#else
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DEVICE_AND_API_INIT(uart_cc13xx_cc26xx_1,
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DT_INST_LABEL(1),
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uart_cc13xx_cc26xx_init_1, &uart_cc13xx_cc26xx_data_1,
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&uart_cc13xx_cc26xx_config_1, POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_cc13xx_cc26xx_driver_api);
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#endif
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#endif /* CONFIG_UART_CC13XX_CC26XX_1 */
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DT_INST_FOREACH(UART_CC13XX_CC26XX_INIT)
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@ -284,142 +284,94 @@ static const struct spi_driver_api spi_cc13xx_cc26xx_driver_api = {
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#warning "No SPI port configured"
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#endif
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|
||||
#ifdef CONFIG_SPI_0
|
||||
static int spi_cc13xx_cc26xx_init_0(struct device *dev)
|
||||
{
|
||||
#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
|
||||
get_dev_data(dev)->pm_state = DEVICE_PM_ACTIVE_STATE;
|
||||
#endif
|
||||
#define SPI_CC13XX_CC26XX_DOMAIN_0 PRCM_DOMAIN_SERIAL
|
||||
#define SPI_CC13XX_CC26XX_DOMAIN_1 PRCM_DOMAIN_PERIPH
|
||||
|
||||
#ifdef CONFIG_SYS_POWER_MANAGEMENT
|
||||
/* Set Power dependencies & constraints */
|
||||
Power_setDependency(PowerCC26XX_PERIPH_SSI0);
|
||||
#define SPI_CC13XX_CC26XX_POWER_SPI(n) \
|
||||
/* Set Power dependencies & constraints */ \
|
||||
Power_setDependency(PowerCC26XX_PERIPH_SSI##n)
|
||||
#else
|
||||
/* Enable SSI0 power domain */
|
||||
PRCMPowerDomainOn(PRCM_DOMAIN_SERIAL);
|
||||
|
||||
/* Enable SSI0 peripherals */
|
||||
PRCMPeripheralRunEnable(PRCM_PERIPH_SSI0);
|
||||
/* Enable in sleep mode until proper power management is added */
|
||||
PRCMPeripheralSleepEnable(PRCM_PERIPH_SSI0);
|
||||
PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_SSI0);
|
||||
|
||||
/* Load PRCM settings */
|
||||
PRCMLoadSet();
|
||||
while (!PRCMLoadGet()) {
|
||||
continue;
|
||||
}
|
||||
|
||||
/* SSI should not be accessed until power domain is on. */
|
||||
while (PRCMPowerDomainStatus(PRCM_DOMAIN_SERIAL) !=
|
||||
PRCM_DOMAIN_POWER_ON) {
|
||||
continue;
|
||||
}
|
||||
#define SPI_CC13XX_CC26XX_POWER_SPI(n) \
|
||||
do { \
|
||||
/* Enable SSI##n power domain */ \
|
||||
PRCMPowerDomainOn(SPI_CC13XX_CC26XX_DOMAIN_##n); \
|
||||
\
|
||||
/* Enable SSI##n peripherals */ \
|
||||
PRCMPeripheralRunEnable(PRCM_PERIPH_SSI##n); \
|
||||
PRCMPeripheralSleepEnable(PRCM_PERIPH_SSI##n); \
|
||||
PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_SSI##n); \
|
||||
\
|
||||
/* Load PRCM settings */ \
|
||||
PRCMLoadSet(); \
|
||||
while (!PRCMLoadGet()) { \
|
||||
continue; \
|
||||
} \
|
||||
\
|
||||
/* SSI should not be accessed until power domain is on. */\
|
||||
while (PRCMPowerDomainStatus( \
|
||||
SPI_CC13XX_CC26XX_DOMAIN_##n) != \
|
||||
PRCM_DOMAIN_POWER_ON) { \
|
||||
continue; \
|
||||
} \
|
||||
} while (0)
|
||||
#endif
|
||||
|
||||
spi_context_unlock_unconditionally(&get_dev_data(dev)->ctx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct spi_cc13xx_cc26xx_config spi_cc13xx_cc26xx_config_0 = {
|
||||
.base = DT_INST_REG_ADDR(0),
|
||||
.sck_pin = DT_PROP(DT_NODELABEL(spi0), sck_pin),
|
||||
.mosi_pin = DT_PROP(DT_NODELABEL(spi0), mosi_pin),
|
||||
.miso_pin = DT_PROP(DT_NODELABEL(spi0), miso_pin),
|
||||
#ifdef DT_TI_CC13XX_CC26XX_SPI_40000000_CS_PIN
|
||||
.cs_pin = DT_PROP(DT_NODELABEL(spi0), cs_pin),
|
||||
#else
|
||||
.cs_pin = IOID_UNUSED,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct spi_cc13xx_cc26xx_data spi_cc13xx_cc26xx_data_0 = {
|
||||
SPI_CONTEXT_INIT_LOCK(spi_cc13xx_cc26xx_data_0, ctx),
|
||||
SPI_CONTEXT_INIT_SYNC(spi_cc13xx_cc26xx_data_0, ctx),
|
||||
};
|
||||
|
||||
#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
|
||||
DEVICE_DEFINE(spi_cc13xx_cc26xx_0, DT_INST_LABEL(0),
|
||||
spi_cc13xx_cc26xx_init_0,
|
||||
spi_cc13xx_cc26xx_pm_control,
|
||||
&spi_cc13xx_cc26xx_data_0, &spi_cc13xx_cc26xx_config_0,
|
||||
POST_KERNEL, CONFIG_SPI_INIT_PRIORITY,
|
||||
&spi_cc13xx_cc26xx_driver_api);
|
||||
#else
|
||||
DEVICE_AND_API_INIT(spi_cc13xx_cc26xx_0, DT_INST_LABEL(0),
|
||||
spi_cc13xx_cc26xx_init_0, &spi_cc13xx_cc26xx_data_0,
|
||||
&spi_cc13xx_cc26xx_config_0, POST_KERNEL,
|
||||
CONFIG_SPI_INIT_PRIORITY, &spi_cc13xx_cc26xx_driver_api);
|
||||
#endif
|
||||
#endif /* CONFIG_SPI_0 */
|
||||
#define SPI_CC13XX_CC26XX_DEVICE_INIT(n) \
|
||||
DEVICE_DEFINE(spi_cc13xx_cc26xx_##n, DT_INST_LABEL(n), \
|
||||
spi_cc13xx_cc26xx_init_##n, \
|
||||
spi_cc13xx_cc26xx_pm_control, \
|
||||
&spi_cc13xx_cc26xx_data_##n, &spi_cc13xx_cc26xx_config_##n, \
|
||||
POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \
|
||||
&spi_cc13xx_cc26xx_driver_api)
|
||||
|
||||
#ifdef CONFIG_SPI_1
|
||||
static int spi_cc13xx_cc26xx_init_1(struct device *dev)
|
||||
{
|
||||
#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
|
||||
get_dev_data(dev)->pm_state = DEVICE_PM_ACTIVE_STATE;
|
||||
#define SPI_CC13XX_CC26XX_INIT_PM_STATE \
|
||||
do { \
|
||||
get_dev_data(dev)->pm_state = DEVICE_PM_ACTIVE_STATE; \
|
||||
} while (0)
|
||||
#else
|
||||
#define SPI_CC13XX_CC26XX_DEVICE_INIT(n) \
|
||||
DEVICE_AND_API_INIT(spi_cc13xx_cc26xx_##n, DT_INST_LABEL(n), \
|
||||
spi_cc13xx_cc26xx_init_##n, &spi_cc13xx_cc26xx_data_##n,\
|
||||
&spi_cc13xx_cc26xx_config_##n, POST_KERNEL, \
|
||||
CONFIG_SPI_INIT_PRIORITY, \
|
||||
&spi_cc13xx_cc26xx_driver_api)
|
||||
|
||||
#define SPI_CC13XX_CC26XX_INIT_PM_STATE
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SYS_POWER_MANAGEMENT
|
||||
/* Set Power dependencies & constraints */
|
||||
Power_setDependency(PowerCC26XX_PERIPH_SSI1);
|
||||
#else
|
||||
/* Enable SSI1 power domain */
|
||||
PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
|
||||
|
||||
/* Enable SSI1 peripherals */
|
||||
PRCMPeripheralRunEnable(PRCM_PERIPH_SSI1);
|
||||
/* Enable in sleep mode until proper power management is added */
|
||||
PRCMPeripheralSleepEnable(PRCM_PERIPH_SSI1);
|
||||
PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_SSI1);
|
||||
|
||||
/* Load PRCM settings */
|
||||
PRCMLoadSet();
|
||||
while (!PRCMLoadGet()) {
|
||||
continue;
|
||||
#define SPI_CC13XX_CC26XX_INIT_FUNC(n) \
|
||||
static int spi_cc13xx_cc26xx_init_##n(struct device *dev) \
|
||||
{ \
|
||||
SPI_CC13XX_CC26XX_INIT_PM_STATE; \
|
||||
\
|
||||
SPI_CC13XX_CC26XX_POWER_SPI(n); \
|
||||
\
|
||||
spi_context_unlock_unconditionally(&get_dev_data(dev)->ctx);\
|
||||
\
|
||||
return 0; \
|
||||
}
|
||||
|
||||
/* SSI should not be accessed until power domain is on. */
|
||||
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) !=
|
||||
PRCM_DOMAIN_POWER_ON) {
|
||||
continue;
|
||||
}
|
||||
#endif
|
||||
#define SPI_CC13XX_CC26XX_INIT(n) \
|
||||
SPI_CC13XX_CC26XX_INIT_FUNC(n) \
|
||||
\
|
||||
static const struct spi_cc13xx_cc26xx_config \
|
||||
spi_cc13xx_cc26xx_config_##n = { \
|
||||
.base = DT_INST_REG_ADDR(n), \
|
||||
.sck_pin = DT_INST_PROP(n, sck_pin), \
|
||||
.mosi_pin = DT_INST_PROP(n, mosi_pin), \
|
||||
.miso_pin = DT_INST_PROP(n, miso_pin), \
|
||||
.cs_pin = COND_CODE_1(DT_INST_NODE_HAS_PROP(n, cs_pin), \
|
||||
(DT_INST_PROP(n, cs_pin)), (IOID_UNUSED)) \
|
||||
}; \
|
||||
\
|
||||
static struct spi_cc13xx_cc26xx_data \
|
||||
spi_cc13xx_cc26xx_data_##n = { \
|
||||
SPI_CONTEXT_INIT_LOCK(spi_cc13xx_cc26xx_data_##n, ctx), \
|
||||
SPI_CONTEXT_INIT_SYNC(spi_cc13xx_cc26xx_data_##n, ctx), \
|
||||
}; \
|
||||
\
|
||||
SPI_CC13XX_CC26XX_DEVICE_INIT(n)
|
||||
|
||||
spi_context_unlock_unconditionally(&get_dev_data(dev)->ctx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct spi_cc13xx_cc26xx_config spi_cc13xx_cc26xx_config_1 = {
|
||||
.base = DT_INST_REG_ADDR(1),
|
||||
.sck_pin = DT_PROP(DT_NODELABEL(spi1), sck_pin),
|
||||
.mosi_pin = DT_PROP(DT_NODELABEL(spi1), mosi_pin),
|
||||
.miso_pin = DT_PROP(DT_NODELABEL(spi1), miso_pin),
|
||||
#ifdef DT_TI_CC13XX_CC26XX_SPI_40008000_CS_PIN
|
||||
.cs_pin = DT_PROP(DT_NODELABEL(spi1), cs_pin),
|
||||
#else
|
||||
.cs_pin = IOID_UNUSED,
|
||||
#endif /* DT_TI_CC13XX_CC26XX_SPI_1_CS_PIN */
|
||||
};
|
||||
|
||||
static struct spi_cc13xx_cc26xx_data spi_cc13xx_cc26xx_data_1 = {
|
||||
SPI_CONTEXT_INIT_LOCK(spi_cc13xx_cc26xx_data_1, ctx),
|
||||
SPI_CONTEXT_INIT_SYNC(spi_cc13xx_cc26xx_data_1, ctx),
|
||||
};
|
||||
|
||||
#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
|
||||
DEVICE_DEFINE(spi_cc13xx_cc26xx_1, DT_INST_LABEL(1),
|
||||
spi_cc13xx_cc26xx_init_1,
|
||||
spi_cc13xx_cc26xx_pm_control,
|
||||
&spi_cc13xx_cc26xx_data_1, &spi_cc13xx_cc26xx_config_1,
|
||||
POST_KERNEL, CONFIG_SPI_INIT_PRIORITY,
|
||||
&spi_cc13xx_cc26xx_driver_api);
|
||||
#else
|
||||
DEVICE_AND_API_INIT(spi_cc13xx_cc26xx_1, DT_INST_LABEL(1),
|
||||
spi_cc13xx_cc26xx_init_1, &spi_cc13xx_cc26xx_data_1,
|
||||
&spi_cc13xx_cc26xx_config_1, POST_KERNEL,
|
||||
CONFIG_SPI_INIT_PRIORITY, &spi_cc13xx_cc26xx_driver_api);
|
||||
#endif
|
||||
#endif /* CONFIG_SPI_1 */
|
||||
DT_INST_FOREACH(SPI_CC13XX_CC26XX_INIT)
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue