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soc: npcx: workaround VCC1_RST hang issue for npcx9m7fb SoC

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Apply the bypass for the issue "Possible Hang-Up After VCC1_RST Reset"
in the NPCX99nFB_Errata.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This commit is contained in:
Jun Lin 2024-02-20 10:16:53 +08:00 • committed by Fabio Baltieri
commit 0907aff2ae
4 changed files with 47 additions and 0 deletions
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8
soc/nuvoton/npcx/common/reg/reg_def.h
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@ -240,6 +240,14 @@ struct scfg_reg {
#define NPCX_LV_GPIO_CTL(base, n) \
(*(volatile uint8_t *)(base + NPCX_LV_GPIO_CTL_OFFSET(n)))
#define NPCX_JEN_CTL1_OFFSET 0x120
#define NPCX_JEN_CTL1(base) (*(volatile uint8_t *)(base + (NPCX_JEN_CTL1_OFFSET)))
#define NPCX_JEN_CTL1_JEN_EN FIELD(0, 4)
#define NPCX_JEN_CTL1_JEN_HEN FIELD(4, 4)
#define NPCX_JEN_CTL1_JEN_ENABLE 0x9
#define NPCX_JEN_CTL1_JEN_DISABLE 0x6
/* SCFG register fields */
#define NPCX_DEVCNT_F_SPI_TRIS 6
#define NPCX_DEVCNT_HIF_TYP_SEL_FIELD FIELD(2, 2)