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boards: stm32: nucleo_f4*1re: Configure clocks using dt

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Configure clock for the f401re/f411re nucleo boards using device tree.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit is contained in:
Armando Visconti 2021-04-28 14:36:30 +02:00 • committed by Anas Nashif
commit 08c750a397
4 changed files with 46 additions and 41 deletions
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23
boards/arm/nucleo_f401re/nucleo_f401re.dts
View file

@ -52,6 +52,29 @@
}; };
}; };
&clk_hse{
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
div-m = <8>;
mul-n = <336>;
div-p = <4>;
div-q = <7>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(84)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
};
&usart1 { &usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>; pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
current-speed = <115200>; current-speed = <115200>;

19
boards/arm/nucleo_f401re/nucleo_f401re_defconfig
View file

@ -2,8 +2,6 @@
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F401XE=y CONFIG_SOC_STM32F401XE=y
# 84MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
# Enable MPU # Enable MPU
CONFIG_ARM_MPU=y CONFIG_ARM_MPU=y
@ -25,20 +23,3 @@ CONFIG_GPIO=y
# clock configuration # clock configuration
CONFIG_CLOCK_CONTROL=y CONFIG_CLOCK_CONTROL=y
# Clock configuration for Cube Clock control driver
CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# use HSE as PLL input
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
# however, the board does not have an external oscillator, so just use
# the 8MHz clock signal coming from integrated STLink
CONFIG_CLOCK_STM32_HSE_BYPASS=y
# produce 84MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=336
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=4
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=1

23
boards/arm/nucleo_f411re/nucleo_f411re.dts
View file

@ -42,6 +42,29 @@
}; };
}; };
&clk_hse{
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
div-m = <8>;
mul-n = <384>;
div-p = <4>;
div-q = <8>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(96)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
};
&usart1 { &usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>; pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
current-speed = <115200>; current-speed = <115200>;

22
boards/arm/nucleo_f411re/nucleo_f411re_defconfig
View file

@ -2,8 +2,6 @@
CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F411XE=y CONFIG_SOC_STM32F411XE=y
# 96MHz system clock (highest value to get a precise USB clock)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
# Enable MPU # Enable MPU
CONFIG_ARM_MPU=y CONFIG_ARM_MPU=y
@ -25,23 +23,3 @@ CONFIG_GPIO=y
# clock configuration # clock configuration
CONFIG_CLOCK_CONTROL=y CONFIG_CLOCK_CONTROL=y
# Clock configuration for Cube Clock control driver
CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# use HSE as PLL input
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
# however, the board does not have an external oscillator, so just use
# the 8MHz clock signal coming from integrated STLink
CONFIG_CLOCK_STM32_HSE_BYPASS=y
# produce 96MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=384
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=4
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=8
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
# APB1 clock must not exceed 50MHz limit
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=1