michaelh/zephyr
1
0
Fork 0
Code Releases Activity

arm: cypress/psoc6: add SoC specific linker input sections

Browse source 
The Cypress PSoC6 specifies some input sections in the startup
scripts. These sections (.heap, .stack, etc.) need to be placed
at correct location.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2018-10-08 10:43:07 -07:00 • committed by Anas Nashif
commit 08c165f2b0
4 changed files with 26 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

2
include/arch/arm/cortex_m/scripts/linker.ld
View file

@ -114,6 +114,8 @@ SECTIONS
KEEP(*(IRQ_VECTOR_TABLE)) KEEP(*(IRQ_VECTOR_TABLE))
KEEP(*(.vectors))
KEEP(*(.openocd_dbg)) KEEP(*(.openocd_dbg))
KEEP(*(".openocd_dbg.*")) KEEP(*(".openocd_dbg.*"))

2
soc/arm/cypress/psoc6/Kconfig.series
View file

@ -11,5 +11,7 @@ config SOC_SERIES_PSOC62
select SYS_POWER_LOW_POWER_STATE_SUPPORTED select SYS_POWER_LOW_POWER_STATE_SUPPORTED
select CPU_HAS_SYSTICK select CPU_HAS_SYSTICK
select HAS_CYPRESS_DRIVERS select HAS_CYPRESS_DRIVERS
select SOC_NOINIT_LD
select SOC_RWDATA_LD
help help
Enable support for Cypress PSoC6 MCU series Enable support for Cypress PSoC6 MCU series

16
soc/arm/cypress/psoc6/soc-noinit.ld Normal file
View file

@ -0,0 +1,16 @@
/*
* Extracted from:
* ext/hal/cypress/.../devices/psoc6/linker/gcc/cy8c6xx6_cm0plus.ld
*
* Size of sections are calculated in the startup scripts,
* so they don't have to be specified here.
*/
. = ALIGN(8);
KEEP(*(.ram_vectors))
. = ALIGN(4);
KEEP(*(.heap))
. = ALIGN(4);
KEEP(*(.stack))

6
soc/arm/cypress/psoc6/soc-rwdata.ld Normal file
View file

@ -0,0 +1,6 @@
/*
* Extracted from:
* ext/hal/cypress/.../devices/psoc6/linker/gcc/cy8c6xx6_cm0plus.ld
*/
KEEP(*(.cy_ramfunc))