dts: arm: nxp: add two i3c instances for RT1180
add i3c instances enable i3c clock under soc folder Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
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2 changed files with 44 additions and 0 deletions
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@ -908,6 +908,32 @@
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status = "disabled";
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#pwm-cells = <3>;
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};
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i3c1: i3c@4330000 {
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compatible = "nxp,mcux-i3c";
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reg = <0x4330000 0x1000>;
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interrupts = <12 0>;
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clocks = <&ccm IMX_CCM_I3C1_CLK 0x67 0>;
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clk-divider = <2>;
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clk-divider-slow = <1>;
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clk-divider-tc = <1>;
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status = "disabled";
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#address-cells = <3>;
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#size-cells = <0>;
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};
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i3c2: i3c@2520000 {
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compatible = "nxp,mcux-i3c";
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reg = <0x2520000 0x1000>;
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interrupts = <61 0>;
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clocks = <&ccm IMX_CCM_I3C2_CLK 0x68 0>;
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clk-divider = <2>;
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clk-divider-slow = <1>;
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clk-divider-tc = <1>;
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status = "disabled";
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#address-cells = <3>;
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#size-cells = <0>;
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};
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};
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&flexspi {
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@ -449,6 +449,24 @@ static ALWAYS_INLINE void clock_init(void)
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#endif /* CONFIG_HAS_MCUX_TPM */
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#ifdef CONFIG_DT_HAS_NXP_MCUX_I3C_ENABLED
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(i3c1), okay)
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/* Configure I3C1 using SYS_PLL3_DIV2_CLK */
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rootCfg.mux = kCLOCK_I3C1_ClockRoot_MuxSysPll3Div2;
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rootCfg.div = 10;
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CLOCK_SetRootClock(kCLOCK_Root_I3c1, &rootCfg);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(i3c2), okay)
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/* Configure I3C2 using SYS_PLL3_DIV2_CLK */
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rootCfg.mux = kCLOCK_I3C2_ClockRoot_MuxSysPll3Div2;
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rootCfg.div = 10;
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CLOCK_SetRootClock(kCLOCK_Root_I3c2, &rootCfg);
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#endif
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#endif /* CONFIG_DT_HAS_NXP_MCUX_I3C_ENABLED */
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/* Keep core clock ungated during WFI */
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CCM->LPCG[1].LPM0 = 0x33333333;
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CCM->LPCG[1].LPM1 = 0x33333333;
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