michaelh/zephyr
1
0
Fork 0
Code Releases Activity

boards/tests: dma: enable dma for S32Z270

Browse source 
Enable dma boards/test for S32Z270.

The non-cacheable memory used for DMA tests (chan_blen_transfer and
loop_transfer) is split from the system SRAM.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
This commit is contained in:
Ha Duong Quang 2024-08-29 10:31:44 +07:00 • committed by Carles Cufí
commit 08a4259a0a
19 changed files with 195 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

2
tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu0.conf Normal file
View file

@ -0,0 +1,2 @@
CONFIG_CODE_DATA_RELOCATION=y
CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="SRAMNOCACHE"

29
tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu0.overlay Normal file
View file

@ -0,0 +1,29 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
/ {
soc {
sram_nocache: memory@31870000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x31870000 DT_SIZE_K(64)>;
zephyr,memory-region = "SRAMNOCACHE";
zephyr,memory-attr = <(DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE))>;
};
};
};
&sram0 {
compatible = "mmio-sram";
reg = <0x31780000 DT_SIZE_K(960)>;
};
&edma0 {
status = "okay";
};
tst_dma0: &edma0 { };

2
tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu1.conf Normal file
View file

@ -0,0 +1,2 @@
CONFIG_CODE_DATA_RELOCATION=y
CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="SRAMNOCACHE"

30
tests/drivers/dma/loop_transfer/boards/s32z2xxdc2_s32z270_rtu1.overlay Normal file
View file

@ -0,0 +1,30 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
/ {
soc {
sram_nocache: memory@35870000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x35870000 DT_SIZE_K(64)>;
zephyr,memory-region = "SRAMNOCACHE";
zephyr,memory-attr = <(DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE))>;
};
};
};
&sram1 {
compatible = "mmio-sram";
reg = <0x35780000 DT_SIZE_K(960)>;
};
&edma5 {
status = "okay";
};
tst_dma0: &edma5 { };