From 0869e62539810702f6a90fbd271e87a235d9083d Mon Sep 17 00:00:00 2001 From: Anas Nashif Date: Sun, 2 Oct 2022 14:46:51 -0400 Subject: [PATCH] intel_adsp: cleanup ace_v1x-regs.h more and prep for removal File still not being removed due to out-of-tree usage. We will drop it once the external code has stopped referencing it. Signed-off-by: Anas Nashif --- drivers/counter/counter_ace_v1x_art.c | 1 - drivers/counter/counter_ace_v1x_rtc.c | 1 - drivers/mm/mm_drv_intel_adsp_mtl_tlb.c | 1 - drivers/timer/intel_adsp_timer.c | 4 -- .../include/intel_ace15_mtpm/ace_v1x-regs.h | 65 ++----------------- .../include/intel_ace15_mtpm/adsp_memory.h | 63 ++++++++++++++++++ soc/xtensa/intel_adsp/ace/power.c | 1 + soc/xtensa/intel_adsp/ace/sram.c | 2 - soc/xtensa/intel_adsp/common/include/soc.h | 2 + soc/xtensa/intel_adsp/common/ipc.c | 2 - 10 files changed, 71 insertions(+), 71 deletions(-) diff --git a/drivers/counter/counter_ace_v1x_art.c b/drivers/counter/counter_ace_v1x_art.c index 2561d3a84fd..166b1e3d8f4 100644 --- a/drivers/counter/counter_ace_v1x_art.c +++ b/drivers/counter/counter_ace_v1x_art.c @@ -8,7 +8,6 @@ #include #include #include -#include #include static struct k_spinlock lock; diff --git a/drivers/counter/counter_ace_v1x_rtc.c b/drivers/counter/counter_ace_v1x_rtc.c index 6bd0129ac70..d2aed15a0ec 100644 --- a/drivers/counter/counter_ace_v1x_rtc.c +++ b/drivers/counter/counter_ace_v1x_rtc.c @@ -8,7 +8,6 @@ #include #include #include -#include #include static int counter_ace_v1x_rtc_get_value(const struct device *dev, diff --git a/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c b/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c index e08a4765ca6..b3817140bd7 100644 --- a/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c +++ b/drivers/mm/mm_drv_intel_adsp_mtl_tlb.c @@ -34,7 +34,6 @@ #include #include -#include #include "mm_drv_common.h" diff --git a/drivers/timer/intel_adsp_timer.c b/drivers/timer/intel_adsp_timer.c index a4b6c8d7bf2..9856d682189 100644 --- a/drivers/timer/intel_adsp_timer.c +++ b/drivers/timer/intel_adsp_timer.c @@ -15,10 +15,6 @@ #define DT_DRV_COMPAT intel_adsp_timer -#ifdef CONFIG_SOC_SERIES_INTEL_ACE -#include -#endif - /** * @file * @brief Intel Audio DSP Wall Clock Timer driver diff --git a/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/ace_v1x-regs.h b/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/ace_v1x-regs.h index 550dd284bf2..8d9df764138 100644 --- a/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/ace_v1x-regs.h +++ b/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/ace_v1x-regs.h @@ -6,66 +6,11 @@ #include #include +#include +#include +#include +#include -/* L2 Local Memory Management */ - -/* These registers are for the L2 memory control and status. */ -#define DFL2MM_REG 0x71d00 - -struct mtl_l2mm { - uint32_t l2mcap; - uint32_t l2mpat; - uint32_t l2mecap; - uint32_t l2mecs; - uint32_t l2hsbpmptr; - uint32_t l2usbpmptr; - uint32_t l2usbmrpptr; - uint32_t l2ucmrpptr; - uint32_t l2ucmrpdptr; -}; - -#define MTL_L2MM ((volatile struct mtl_l2mm *)DFL2MM_REG) - -/* DfL2MCAP */ -struct mtl_l2mcap { - uint32_t l2hss : 8; - uint32_t l2uss : 4; - uint32_t l2hsbs : 4; - uint32_t l2hs2s : 8; - uint32_t l2usbs : 5; - uint32_t l2se : 1; - uint32_t el2se : 1; - uint32_t rsvd32 : 1; -}; - -#define MTL_L2MCAP ((volatile struct mtl_l2mcap *)DFL2MM_REG) - -static inline uint32_t mtl_hpsram_get_bank_count(void) -{ - return MTL_L2MCAP->l2hss; -} - -static inline uint32_t mtl_lpsram_get_bank_count(void) -{ - return MTL_L2MCAP->l2uss; -} - -struct mtl_hpsram_regs { - /** @brief power gating control */ - uint8_t HSxPGCTL; - /** @brief retention mode control */ - uint8_t HSxRMCTL; - uint8_t reserved[2]; - /** @brief power gating status */ - uint8_t HSxPGISTS; - uint8_t reserved1[3]; -}; - -/* These registers are for the L2 HP SRAM bank power management control and status.*/ -#define L2HSBPM_REG 0x17A800 -#define L2HSBPM_REG_SIZE 0x0008 - -#define HPSRAM_REGS(block_idx) ((volatile struct mtl_hpsram_regs *const) \ - (L2HSBPM_REG + L2HSBPM_REG_SIZE * (block_idx))) +/* FIXME: This file is to be removed after all users have been adapted */ #endif /* ZEPHYR_SOC_INTEL_ADSP_ACE_v1x_REGS_H_ */ diff --git a/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/adsp_memory.h b/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/adsp_memory.h index b6d81e6dbb1..c4b6a3d1352 100644 --- a/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/adsp_memory.h +++ b/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/adsp_memory.h @@ -57,4 +57,67 @@ /* The number of set associative cache way supported on L1 Instruction Cache */ #define ADSP_CxL1CCAP_ICMWC ((ADSP_CxL1CCAP_REG >> 20) & 7) +#ifndef _LINKER +/* L2 Local Memory Management */ + +/* These registers are for the L2 memory control and status. */ +#define DFL2MM_REG 0x71d00 + +struct mtl_l2mm { + uint32_t l2mcap; + uint32_t l2mpat; + uint32_t l2mecap; + uint32_t l2mecs; + uint32_t l2hsbpmptr; + uint32_t l2usbpmptr; + uint32_t l2usbmrpptr; + uint32_t l2ucmrpptr; + uint32_t l2ucmrpdptr; +}; + +#define MTL_L2MM ((volatile struct mtl_l2mm *)DFL2MM_REG) + +/* DfL2MCAP */ +struct mtl_l2mcap { + uint32_t l2hss : 8; + uint32_t l2uss : 4; + uint32_t l2hsbs : 4; + uint32_t l2hs2s : 8; + uint32_t l2usbs : 5; + uint32_t l2se : 1; + uint32_t el2se : 1; + uint32_t rsvd32 : 1; +}; + +#define MTL_L2MCAP ((volatile struct mtl_l2mcap *)DFL2MM_REG) + +static inline uint32_t mtl_hpsram_get_bank_count(void) +{ + return MTL_L2MCAP->l2hss; +} + +static inline uint32_t mtl_lpsram_get_bank_count(void) +{ + return MTL_L2MCAP->l2uss; +} + +struct mtl_hpsram_regs { + /** @brief power gating control */ + uint8_t HSxPGCTL; + /** @brief retention mode control */ + uint8_t HSxRMCTL; + uint8_t reserved[2]; + /** @brief power gating status */ + uint8_t HSxPGISTS; + uint8_t reserved1[3]; +}; +#endif + +/* These registers are for the L2 HP SRAM bank power management control and status.*/ +#define L2HSBPM_REG 0x17A800 +#define L2HSBPM_REG_SIZE 0x0008 + +#define HPSRAM_REGS(block_idx) ((volatile struct mtl_hpsram_regs *const) \ + (L2HSBPM_REG + L2HSBPM_REG_SIZE * (block_idx))) + #endif /* ZEPHYR_SOC_INTEL_ADSP_MEMORY_H_ */ diff --git a/soc/xtensa/intel_adsp/ace/power.c b/soc/xtensa/intel_adsp/ace/power.c index 6774330f44a..8b0a94dddfb 100644 --- a/soc/xtensa/intel_adsp/ace/power.c +++ b/soc/xtensa/intel_adsp/ace/power.c @@ -9,6 +9,7 @@ #include #include +#include #define LPSRAM_MAGIC_VALUE 0x13579BDF #define LPSCTL_BATTR_MASK GENMASK(16, 12) diff --git a/soc/xtensa/intel_adsp/ace/sram.c b/soc/xtensa/intel_adsp/ace/sram.c index 9a40ca53bc4..e2e8a8ce4ac 100644 --- a/soc/xtensa/intel_adsp/ace/sram.c +++ b/soc/xtensa/intel_adsp/ace/sram.c @@ -12,8 +12,6 @@ #include #include #include "manifest.h" -#include - #define DELAY_COUNT 256 diff --git a/soc/xtensa/intel_adsp/common/include/soc.h b/soc/xtensa/intel_adsp/common/include/soc.h index 4b6ce1259d9..95a7c9a03c9 100644 --- a/soc/xtensa/intel_adsp/common/include/soc.h +++ b/soc/xtensa/intel_adsp/common/include/soc.h @@ -11,6 +11,8 @@ #include #include +#include + #define SSP_MN_DIV_SIZE (8) #define SSP_MN_DIV_BASE(x) \ diff --git a/soc/xtensa/intel_adsp/common/ipc.c b/soc/xtensa/intel_adsp/common/ipc.c index d31cc73af45..4198d5f082a 100644 --- a/soc/xtensa/intel_adsp/common/ipc.c +++ b/soc/xtensa/intel_adsp/common/ipc.c @@ -157,8 +157,6 @@ bool intel_adsp_ipc_send_message_sync(const struct device *dev, #if DT_NODE_EXISTS(INTEL_ADSP_IPC_HOST_DTNODE) #if defined(CONFIG_SOC_SERIES_INTEL_ACE) -#include - static inline void ace_ipc_intc_unmask(void) { for (int i = 0; i < CONFIG_MP_NUM_CPUS; i++) {