tests: nrf: enable twister tests for nrf54l20pdk

Enabled the following tests on nrf54l20
- i2c_slave
- clock_control_api
- nrf_clock_calibration
- nrf_lf_clock_start
- onoff
- retained_mem/api
- uart_elementary
- uart_errors
- uart_mix_fifo_poll
- uart_pm
- uart_async_api
- wdt_error_cases
- wdt_basic_api
- counter_basic_api
- fcb
- nrf/qdec

Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
This commit is contained in:
Rafał Kuźnia 2024-12-02 11:04:38 +01:00 committed by Benjamin Cabé
commit 07ee796c7d
28 changed files with 431 additions and 2 deletions

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@ -0,0 +1 @@
CONFIG_NRFX_TWIS22=y

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@ -0,0 +1,60 @@
/ {
aliases {
i2c-slave = &i2c22;
};
};
&pinctrl {
i2c21_default_alt: i2c21_default_alt {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 8)>,
<NRF_PSEL(TWIM_SCL, 1, 14)>;
};
};
i2c21_sleep_alt: i2c21_sleep_alt {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 8)>,
<NRF_PSEL(TWIM_SCL, 1, 14)>;
low-power-enable;
};
};
i2c22_default_alt: i2c22_default_alt {
group1 {
/* Temporary workaround as it is currently not possible
* to configure pins for TWIS with pinctrl.
*/
psels = <NRF_PSEL(TWIM_SDA, 1, 9)>,
<NRF_PSEL(TWIM_SCL, 1, 15)>;
bias-pull-up;
};
};
i2c22_sleep_alt: i2c22_sleep_alt {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 9)>,
<NRF_PSEL(TWIM_SCL, 1, 15)>;
low-power-enable;
};
};
};
&i2c21 {
compatible = "nordic,nrf-twim";
status = "okay";
pinctrl-0 = <&i2c21_default_alt>;
pinctrl-1 = <&i2c21_sleep_alt>;
pinctrl-names = "default", "sleep";
sensor: sensor@54 {
reg = <0x54>;
};
};
&i2c22 {
compatible = "nordic,nrf-twis";
status = "okay";
pinctrl-0 = <&i2c22_default_alt>;
pinctrl-1 = <&i2c22_sleep_alt>;
pinctrl-names = "default", "sleep";
};

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@ -11,6 +11,7 @@ tests:
- nrf52840dk/nrf52840
- nrf5340dk/nrf5340/cpuapp
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54h20dk/nrf54h20/cpuapp
integration_platforms:
- nrf52840dk/nrf52840

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@ -0,0 +1,53 @@
/*
* Copyright 2024 Nordic Semiconductor ASA
* SPDX-License-Identifier: Apache-2.0
*/
/ {
aliases {
qdec0 = &qdec20;
qenca = &phase_a;
qencb = &phase_b;
};
encoder-emulate {
compatible = "gpio-leds";
phase_a: phase_a {
gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
};
phase_b: phase_b {
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
};
};
&pinctrl {
qdec_pinctrl: qdec_pinctrl {
group1 {
psels = <NRF_PSEL(QDEC_A, 1, 8)>,
<NRF_PSEL(QDEC_B, 1, 10)>;
};
};
qdec_sleep_pinctrl: qdec_sleep_pinctrl {
group1 {
psels = <NRF_PSEL(QDEC_A, 1, 8)>,
<NRF_PSEL(QDEC_B, 1, 10)>;
low-power-enable;
};
};
};
&gpio1 {
status = "okay";
};
&qdec20 {
status = "okay";
pinctrl-0 = <&qdec_pinctrl>;
pinctrl-1 = <&qdec_sleep_pinctrl>;
pinctrl-names = "default", "sleep";
steps = <127>;
led-pre = <500>;
zephyr,pm-device-runtime-auto;
};

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@ -22,6 +22,7 @@ tests:
- nrf52840dk/nrf52840
- nrf9160dk/nrf9160
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
integration_platforms:
- nrf51dk/nrf51822
drivers.clock.clock_control_nrf5_lfclk_rc:
@ -30,6 +31,7 @@ tests:
- nrf52dk/nrf52832
- nrf52840dk/nrf52840
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
integration_platforms:
- nrf51dk/nrf51822
extra_args: CONF_FILE="nrf_lfclk_rc.conf"

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@ -8,5 +8,6 @@ tests:
- nrf52dk/nrf52832
- nrf52840dk/nrf52840
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
integration_platforms:
- nrf51dk/nrf51822

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@ -14,6 +14,7 @@ tests:
- nrf5340dk/nrf5340/cpuapp
- nrf5340dk/nrf5340/cpunet
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
extra_configs:
- CONFIG_SYSTEM_CLOCK_WAIT_FOR_STABILITY=y
- CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y
@ -29,6 +30,7 @@ tests:
- nrf5340dk/nrf5340/cpuapp
- nrf5340dk/nrf5340/cpunet
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
extra_configs:
- CONFIG_SYSTEM_CLOCK_WAIT_FOR_AVAILABILITY=y
- CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y
@ -58,6 +60,7 @@ tests:
- nrf5340dk/nrf5340/cpuapp
- nrf5340dk/nrf5340/cpunet
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
integration_platforms:
- nrf51dk/nrf51822
extra_configs:
@ -72,6 +75,7 @@ tests:
- nrf5340dk/nrf5340/cpuapp
- nrf5340dk/nrf5340/cpunet
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
integration_platforms:
- nrf51dk/nrf51822
extra_configs:
@ -86,6 +90,7 @@ tests:
- nrf5340dk/nrf5340/cpuapp
- nrf5340dk/nrf5340/cpunet
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
integration_platforms:
- nrf51dk/nrf51822
extra_configs:
@ -100,6 +105,7 @@ tests:
- nrf5340dk/nrf5340/cpuapp
- nrf5340dk/nrf5340/cpunet
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
integration_platforms:
- nrf51dk/nrf51822
extra_configs:
@ -114,6 +120,7 @@ tests:
- nrf5340dk/nrf5340/cpuapp
- nrf5340dk/nrf5340/cpunet
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
integration_platforms:
- nrf51dk/nrf51822
extra_configs:
@ -128,6 +135,7 @@ tests:
- nrf5340dk/nrf5340/cpuapp
- nrf5340dk/nrf5340/cpunet
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
integration_platforms:
- nrf51dk/nrf51822
extra_configs:

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@ -8,6 +8,7 @@ tests:
- nrf52dk/nrf52832
- nrf52840dk/nrf52840
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf9160dk/nrf9160
integration_platforms:
- nrf51dk/nrf51822

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@ -0,0 +1,34 @@
&timer00 {
prescaler = <6>;
status = "okay";
};
&timer10 {
prescaler = <4>;
status = "okay";
};
&timer20 {
prescaler = <4>;
status = "okay";
};
&timer21 {
prescaler = <4>;
status = "okay";
};
&timer22 {
prescaler = <4>;
status = "okay";
};
&timer23 {
prescaler = <4>;
status = "okay";
};
&timer24 {
prescaler = <4>;
status = "okay";
};

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@ -0,0 +1,20 @@
&pinctrl {
pwm_default: pwm_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 1, 0)>;
};
};
pwm_sleep: pwm_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 1, 0)>;
low-power-enable;
};
};
};
&pwm20 {
status = "okay";
pinctrl-0 = <&pwm_default>;
pinctrl-1 = <&pwm_sleep>;
pinctrl-names = "default", "sleep";
};

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@ -0,0 +1 @@
CONFIG_POWEROFF=y

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@ -0,0 +1,22 @@
/ {
cpuapp_sram@2002e000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x2002e000 DT_SIZE_K(4)>;
zephyr,memory-region = "RetainedMem";
status = "okay";
retainedmem0: retainedmem {
compatible = "zephyr,retained-ram";
status = "okay";
};
};
aliases {
retainedmemtestdevice = &retainedmem0;
};
};
&cpuapp_sram {
reg = <0x20000000 DT_SIZE_K(184)>;
ranges = <0x0 0x20000000 0x2e000>;
};

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@ -12,6 +12,7 @@ tests:
- nrf54l15dk/nrf54l05/cpuapp
- nrf54l15dk/nrf54l10/cpuapp
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
integration_platforms:
- qemu_cortex_m3
tags:

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@ -0,0 +1,26 @@
/* SPDX-License-Identifier: Apache-2.0 */
&pinctrl {
uart21_default_alt: uart21_default_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>;
};
};
uart21_sleep_alt: uart21_sleep_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
pinctrl-0 = <&uart21_default_alt>;
pinctrl-1 = <&uart21_sleep_alt>;
pinctrl-names = "default", "sleep";
current-speed = <115200>;
};

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@ -30,6 +30,7 @@ tests:
- nrf52840dk/nrf52840
- nrf52_bsim
- nrf5340bsim/nrf5340/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54l15bsim/nrf54l15/cpuapp
filter: CONFIG_SERIAL_SUPPORT_ASYNC
harness: ztest

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@ -0,0 +1,31 @@
/* SPDX-License-Identifier: Apache-2.0 */
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
hw-flow-control;
};

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@ -12,6 +12,7 @@ tests:
platform_allow:
- nrf54h20dk/nrf54h20/cpuapp
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54l15dk/nrf54l15/cpuflpr
- nrf5340dk/nrf5340/cpuapp
integration_platforms:
@ -44,6 +45,7 @@ tests:
filter: CONFIG_SERIAL_SUPPORT_INTERRUPT
platform_allow:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
extra_args: DTC_OVERLAY_FILE="boards/nrf54l15dk_nrf54l15_cpuapp_dual_uart.overlay"
extra_configs:
- CONFIG_DUAL_UART_TEST=y
@ -51,6 +53,7 @@ tests:
filter: CONFIG_SERIAL_SUPPORT_INTERRUPT
platform_allow:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
extra_args: DTC_OVERLAY_FILE="boards/nrf54l15dk_nrf54l15_cpuapp_dual_uart.overlay"
extra_configs:
- CONFIG_DUAL_UART_TEST=y

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@ -0,0 +1,54 @@
/* SPDX-License-Identifier: Apache-2.0 */
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 8)>,
<NRF_PSEL(UART_RTS, 1, 10)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 8)>,
<NRF_PSEL(UART_RTS, 1, 10)>;
low-power-enable;
};
};
uart22_default: uart22_default {
group1 {
psels =
<NRF_PSEL(UART_CTS, 1, 11)>;
bias-pull-up;
};
group2 {
psels = <NRF_PSEL(UART_TX, 1, 9)>;
};
};
uart22_sleep: uart22_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>,
<NRF_PSEL(UART_CTS, 1, 11)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
};
dut_aux: &uart22 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart22_default>;
pinctrl-1 = <&uart22_sleep>;
pinctrl-names = "default", "sleep";
disable-rx;
};

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@ -12,12 +12,14 @@ tests:
platform_allow:
- nrf54h20dk/nrf54h20/cpuapp
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf5340dk/nrf5340/cpuapp
drivers.uart.uart_errors.async:
filter: CONFIG_SERIAL_SUPPORT_ASYNC
platform_allow:
- nrf54h20dk/nrf54h20/cpuapp
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf5340dk/nrf5340/cpuapp
extra_configs:
- CONFIG_UART_ASYNC_API=y

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@ -0,0 +1,43 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_RTS, 1, 8)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
low-power-enable;
};
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
hw-flow-control;
};
counter_dev: &timer00 {
status = "okay";
};
&grtc {
interrupts = <228 2>;
};

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@ -10,6 +10,7 @@ common:
- nrf5340dk/nrf5340/cpuapp
- nrf5340bsim/nrf5340/cpuapp
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54l15bsim/nrf54l15/cpuapp
- nrf54h20dk/nrf54h20/cpuapp
- nrf54h20dk/nrf54h20/cpurad
@ -85,6 +86,7 @@ tests:
- CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y
platform_exclude:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54h20dk/nrf54h20/cpuapp
- nrf54h20dk/nrf54h20/cpurad
@ -96,6 +98,7 @@ tests:
- CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y
platform_exclude:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54h20dk/nrf54h20/cpuapp
- nrf54h20dk/nrf54h20/cpurad
@ -108,5 +111,6 @@ tests:
- CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y
platform_exclude:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54h20dk/nrf54h20/cpuapp
- nrf54h20dk/nrf54h20/cpurad

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@ -0,0 +1,36 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>;
};
};
uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 10)>,
<NRF_PSEL(UART_RX, 1, 11)>;
low-power-enable;
};
};
};
/ {
chosen {
zephyr,console = &uart20;
};
};
dut: &uart21 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart21_default>;
pinctrl-1 = <&uart21_sleep>;
pinctrl-names = "default", "sleep";
};

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@ -6,6 +6,7 @@ common:
platform_allow:
- nrf52840dk/nrf52840
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54l15bsim/nrf54l15/cpuapp
- nrf54h20dk/nrf54h20/cpuapp
- nrf52_bsim
@ -32,6 +33,7 @@ tests:
extra_args: DTC_OVERLAY_FILE="boards/nrf52840dk_nrf52840.overlay;nrf_rx_disable.overlay"
platform_exclude:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54l15bsim/nrf54l15/cpuapp
- nrf54h20dk/nrf54h20/cpuapp
@ -43,6 +45,7 @@ tests:
- CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y
platform_exclude:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54h20dk/nrf54h20/cpuapp
drivers.uart.pm.int_driven:
@ -62,6 +65,7 @@ tests:
- CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y
platform_exclude:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54h20dk/nrf54h20/cpuapp
drivers.uart.pm.async:
@ -81,4 +85,5 @@ tests:
- CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y
platform_exclude:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54h20dk/nrf54h20/cpuapp

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@ -0,0 +1,9 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
&wdt31 {
status = "okay";
};

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@ -0,0 +1,9 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
&wdt31 {
status = "okay";
};

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@ -42,8 +42,7 @@
#define DEFAULT_WINDOW_MIN (0U)
/* Align tests to the specific target: */
#if defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || \
defined(CONFIG_SOC_NRF54L15) || defined(CONFIG_SOC_NRF54H20) || defined(CONFIG_SOC_NRF9280)
#if defined(CONFIG_SOC_SERIES_NRF54LX) || defined(CONFIG_SOC_NRF9280)
#define WDT_TEST_FLAGS \
(WDT_DISABLE_SUPPORTED | WDT_FLAG_RESET_SOC_SUPPORTED | \
WDT_FLAG_ONLY_ONE_TIMEOUT_VALUE_SUPPORTED | WDT_OPT_PAUSE_IN_SLEEP_SUPPORTED | \

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@ -9,6 +9,7 @@ tests:
drivers.watchdog.wdt_error_cases:
platform_allow:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
- nrf54h20dk/nrf54h20/cpuapp
- nrf54h20dk/nrf54h20/cpurad
- nrf9280pdk/nrf9280/cpuapp

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@ -13,6 +13,7 @@ tests:
filesystem.fcb.no_erase:
platform_allow:
- nrf54l15dk/nrf54l15/cpuapp
- nrf54l20pdk/nrf54l20/cpuapp
filesystem.fcb.native_sim.no_erase:
extra_args: CONFIG_FLASH_SIMULATOR_EXPLICIT_ERASE=n
platform_allow: native_sim