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boards: soc: arm: Set zephyr,sram chosen node for i.mx rt boards

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Removes the DATA_LOCATION Kconfig symbol from the i.mx rt soc series and
refactors corresponding boards to use a device tree chosen node instead.
The external SDRAM is chosen on all boards that can support it;
otherwise the internal DTCM is chosen.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2020-10-20 19:13:43 -05:00
commit 07976026a2
15 changed files with 12 additions and 68 deletions
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1
boards/arm/mimxrt1010_evk/mimxrt1010_evk.dts
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@ -18,6 +18,7 @@
}; };
chosen { chosen {
zephyr,sram = &dtcm;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;
}; };

1
boards/arm/mimxrt1015_evk/mimxrt1015_evk.dts
View file

@ -18,6 +18,7 @@
}; };
chosen { chosen {
zephyr,sram = &dtcm;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;
}; };

4
boards/arm/mimxrt1020_evk/Kconfig.defconfig
View file

@ -12,10 +12,6 @@ choice CODE_LOCATION
default CODE_FLEXSPI default CODE_FLEXSPI
endchoice endchoice
choice DATA_LOCATION
default DATA_SEMC
endchoice
if NETWORKING if NETWORKING
config NET_L2_ETHERNET config NET_L2_ETHERNET

1
boards/arm/mimxrt1020_evk/mimxrt1020_evk.dts
View file

@ -18,6 +18,7 @@
}; };
chosen { chosen {
zephyr,sram = &sdram0;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;
}; };

4
boards/arm/mimxrt1050_evk/Kconfig.defconfig
View file

@ -12,10 +12,6 @@ choice CODE_LOCATION
default CODE_FLEXSPI default CODE_FLEXSPI
endchoice endchoice
choice DATA_LOCATION
default DATA_SEMC
endchoice
config DISK_ACCESS_USDHC1 config DISK_ACCESS_USDHC1
default y default y
depends on DISK_ACCESS_USDHC depends on DISK_ACCESS_USDHC

1
boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts
View file

@ -19,6 +19,7 @@
}; };
chosen { chosen {
zephyr,sram = &sdram0;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;
}; };

4
boards/arm/mimxrt1060_evk/Kconfig.defconfig
View file

@ -13,10 +13,6 @@ choice CODE_LOCATION
default CODE_FLEXSPI default CODE_FLEXSPI
endchoice endchoice
choice DATA_LOCATION
default DATA_SEMC
endchoice
config DISK_ACCESS_USDHC1 config DISK_ACCESS_USDHC1
default y default y
depends on DISK_ACCESS_USDHC depends on DISK_ACCESS_USDHC

1
boards/arm/mimxrt1060_evk/mimxrt1060_evk.dts
View file

@ -19,6 +19,7 @@
}; };
chosen { chosen {
zephyr,sram = &sdram0;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;
zephyr,can-primary = &flexcan2; zephyr,can-primary = &flexcan2;

4
boards/arm/mimxrt1064_evk/Kconfig.defconfig
View file

@ -12,10 +12,6 @@ choice CODE_LOCATION
default CODE_FLEXSPI2 default CODE_FLEXSPI2
endchoice endchoice
choice DATA_LOCATION
default DATA_SEMC
endchoice
config DISK_ACCESS_USDHC1 config DISK_ACCESS_USDHC1
default y default y
depends on DISK_ACCESS_USDHC depends on DISK_ACCESS_USDHC

1
boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts
View file

@ -20,6 +20,7 @@
}; };
chosen { chosen {
zephyr,sram = &sdram0;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;
zephyr,can-primary = &flexcan2; zephyr,can-primary = &flexcan2;

4
boards/arm/mm_swiftio/Kconfig.defconfig
View file

@ -12,10 +12,6 @@ choice CODE_LOCATION
default CODE_FLEXSPI default CODE_FLEXSPI
endchoice endchoice
choice DATA_LOCATION
default DATA_SEMC
endchoice
config DISK_ACCESS_USDHC1 config DISK_ACCESS_USDHC1
default y default y
depends on DISK_ACCESS_USDHC depends on DISK_ACCESS_USDHC

1
boards/arm/mm_swiftio/mm_swiftio.dts
View file

@ -19,6 +19,7 @@
}; };
chosen { chosen {
zephyr,sram = &sdram0;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;
}; };

30
soc/arm/nxp_imx/rt/Kconfig.defconfig.series
View file

@ -98,36 +98,6 @@ config FLASH_BASE_ADDRESS
endif # CODE_FLEXSPI2 endif # CODE_FLEXSPI2
if DATA_DTCM
config SRAM_SIZE
default $(dt_node_reg_size_int,/soc/flexram@400b0000/dtcm@20000000,0,K)
config SRAM_BASE_ADDRESS
default $(dt_node_reg_addr_hex,/soc/flexram@400b0000/dtcm@20000000)
endif # DATA_DTCM
if DATA_SEMC
config SRAM_SIZE
default $(dt_node_reg_size_int,/memory@80000000,0,K)
config SRAM_BASE_ADDRESS
default $(dt_node_reg_addr_hex,/memory@80000000)
endif # DATA_SEMC
if DATA_OCRAM
config SRAM_SIZE
default $(dt_node_reg_size_int,/soc/flexram@400b0000/ocram@20200000,0,K)
config SRAM_BASE_ADDRESS
default $(dt_node_reg_addr_hex,/soc/flexram@400b0000/ocram@20200000)
endif # DATA_OCRAM
config USB_DC_NXP_EHCI config USB_DC_NXP_EHCI
default y default y
depends on USB depends on USB

15
soc/arm/nxp_imx/rt/Kconfig.soc
View file

@ -413,19 +413,4 @@ config CODE_FLEXSPI2
endchoice endchoice
choice DATA_LOCATION
prompt "Data location selection"
default DATA_DTCM
config DATA_DTCM
bool "Link data into internal data tightly coupled memory (DTCM)"
config DATA_SEMC
bool "Link data into external SEMC-controlled memory"
config DATA_OCRAM
bool "Link data into On-Chip RAM memory"
endchoice
endif # SOC_SERIES_IMX_RT endif # SOC_SERIES_IMX_RT

8
soc/arm/nxp_imx/rt/linker.ld
View file

@ -7,15 +7,17 @@
#include <autoconf.h> #include <autoconf.h>
#include <devicetree.h> #include <devicetree.h>
#define IS_CHOSEN_SRAM(x) (DT_DEP_ORD(DT_NODELABEL(x)) == DT_DEP_ORD(DT_CHOSEN(zephyr_sram)))
MEMORY MEMORY
{ {
#if (DT_REG_SIZE(DT_NODELABEL(ocram)) > 0) && !defined(CONFIG_DATA_OCRAM) #if (DT_REG_SIZE(DT_NODELABEL(ocram)) > 0) && !IS_CHOSEN_SRAM(ocram)
OCRAM (wx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(ocram)), LENGTH = DT_REG_SIZE(DT_NODELABEL(ocram)) OCRAM (wx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(ocram)), LENGTH = DT_REG_SIZE(DT_NODELABEL(ocram))
#endif #endif
#if (DT_REG_SIZE(DT_NODELABEL(sdram0)) > 0) && !defined(CONFIG_DATA_SEMC) #if (DT_REG_SIZE(DT_NODELABEL(sdram0)) > 0) && !IS_CHOSEN_SRAM(sdram0)
SDRAM (wx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(sdram0)), LENGTH = DT_REG_SIZE(DT_NODELABEL(sdram0)) SDRAM (wx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(sdram0)), LENGTH = DT_REG_SIZE(DT_NODELABEL(sdram0))
#endif #endif
#if (DT_REG_SIZE(DT_INST(0, nxp_imx_dtcm)) > 0) && !defined(CONFIG_DATA_DTCM) #if (DT_REG_SIZE(DT_INST(0, nxp_imx_dtcm)) > 0) && !IS_CHOSEN_SRAM(dtcm)
DTCM (wx) : ORIGIN = DT_REG_ADDR(DT_INST(0, nxp_imx_dtcm)), LENGTH = DT_REG_SIZE(DT_INST(0, nxp_imx_dtcm)) DTCM (wx) : ORIGIN = DT_REG_ADDR(DT_INST(0, nxp_imx_dtcm)), LENGTH = DT_REG_SIZE(DT_INST(0, nxp_imx_dtcm))
#endif #endif
#if (DT_REG_SIZE(DT_INST(0, nxp_imx_itcm)) > 0) && !defined(CONFIG_CODE_ITCM) #if (DT_REG_SIZE(DT_INST(0, nxp_imx_itcm)) > 0) && !defined(CONFIG_CODE_ITCM)