From 078f6098e2266ae159a297d48c54292d0c0e8198 Mon Sep 17 00:00:00 2001 From: Nathaniel Graff Date: Fri, 30 Nov 2018 15:17:03 -0800 Subject: [PATCH] soc/sifive-freedom: Use DTS to generate PLIC addrs Describe the MMIO register regions for the PLIC in the DTS instead of hardcoded in soc.h Signed-off-by: Nathaniel Graff --- dts/riscv32/riscv32-fe310.dtsi | 6 ++++-- soc/riscv32/riscv-privilege/sifive-freedom/dts_fixup.h | 10 ++++++++++ soc/riscv32/riscv-privilege/sifive-freedom/soc.h | 7 ------- 3 files changed, 14 insertions(+), 9 deletions(-) diff --git a/dts/riscv32/riscv32-fe310.dtsi b/dts/riscv32/riscv32-fe310.dtsi index 0910f099cad..adf96cdefd5 100644 --- a/dts/riscv32/riscv32-fe310.dtsi +++ b/dts/riscv32/riscv32-fe310.dtsi @@ -88,8 +88,10 @@ compatible = "riscv,plic0"; interrupt-controller; interrupts-extended = <&hlic 11>; - reg = <0xc000000 0x4000000>; - reg-names = "control"; + reg = <0xc000000 0x2000 + 0xc002000 0x1fe000 + 0xc200000 0x2000000>; + reg-names = "prio", "irq_en", "reg"; riscv,max-priority = <7>; riscv,ndev = <52>; }; diff --git a/soc/riscv32/riscv-privilege/sifive-freedom/dts_fixup.h b/soc/riscv32/riscv-privilege/sifive-freedom/dts_fixup.h index ce84912185a..fcb88f1cc9a 100644 --- a/soc/riscv32/riscv-privilege/sifive-freedom/dts_fixup.h +++ b/soc/riscv32/riscv-privilege/sifive-freedom/dts_fixup.h @@ -40,6 +40,16 @@ #define DT_SIFIVE_GPIO_0_IRQ_31 DT_SIFIVE_GPIO0_10012000_IRQ_31 #define DT_SIFIVE_GPIO_0_SIZE DT_SIFIVE_GPIO0_10012000_SIZE +/* PLIC */ +#define DT_PLIC_MAX_PRIORITY \ + DT_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY +#define DT_PLIC_PRIO_BASE_ADDR \ + DT_RISCV_PLIC0_C000000_PRIO_BASE_ADDRESS +#define DT_PLIC_IRQ_EN_BASE_ADDR \ + DT_RISCV_PLIC0_C000000_IRQ_EN_BASE_ADDRESS +#define DT_PLIC_REG_BASE_ADDR \ + DT_RISCV_PLIC0_C000000_REG_BASE_ADDRESS + /* UART 0 */ #define DT_SIFIVE_UART_0_BASE_ADDR DT_SIFIVE_UART0_10013000_BASE_ADDRESS #define DT_SIFIVE_UART_0_CURRENT_SPEED DT_SIFIVE_UART0_10013000_CURRENT_SPEED diff --git a/soc/riscv32/riscv-privilege/sifive-freedom/soc.h b/soc/riscv32/riscv-privilege/sifive-freedom/soc.h index 14d5e5237a1..c516ef44264 100644 --- a/soc/riscv32/riscv-privilege/sifive-freedom/soc.h +++ b/soc/riscv32/riscv-privilege/sifive-freedom/soc.h @@ -23,13 +23,6 @@ /* PINMUX MAX PINS */ #define SIFIVE_PINMUX_PINS 32 -/* Platform Level Interrupt Controller Configuration */ -#define PLIC_PRIO_BASE_ADDR PLIC_BASE_ADDRESS -#define PLIC_IRQ_EN_BASE_ADDR (PLIC_BASE_ADDRESS + 0x2000) -#define PLIC_REG_BASE_ADDR (PLIC_BASE_ADDRESS + 0x200000) - -#define PLIC_MAX_PRIORITY PLIC_RISCV_MAX_PRIORITY - /* Clock controller. */ #define PRCI_BASE_ADDR 0x10008000