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x86: implement hw-based oops for both variants

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We use a fixed value of 32 as the way interrupts/exceptions
are setup in x86_64's locore.S do not lend themselves to
Kconfig configuration of the vector to use.

HW-based kernel oops is now permanently on, there's no reason
to make it optional that I can see.

Default vectors for IPI and irq offload adjusted to not
collide.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2019-12-18 14:12:54 -08:00 • committed by Anas Nashif
commit 077b587447
14 changed files with 63 additions and 50 deletions
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4
include/arch/x86/ia32/arch.h
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@ -410,17 +410,15 @@ extern void k_float_enable(struct k_thread *thread, unsigned int options);
extern struct task_state_segment _main_tss;
#endif
#if CONFIG_X86_KERNEL_OOPS
#define ARCH_EXCEPT(reason_p) do { \
__asm__ volatile( \
"push %[reason]\n\t" \
"int %[vector]\n\t" \
: \
: [vector] "i" (CONFIG_X86_KERNEL_OOPS_VECTOR), \
: [vector] "i" (Z_X86_OOPS_VECTOR), \
[reason] "i" (reason_p)); \
CODE_UNREACHABLE; \
} while (false)
#endif
#ifdef __cplusplus
}