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x86: implement hw-based oops for both variants

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We use a fixed value of 32 as the way interrupts/exceptions
are setup in x86_64's locore.S do not lend themselves to
Kconfig configuration of the vector to use.

HW-based kernel oops is now permanently on, there's no reason
to make it optional that I can see.

Default vectors for IPI and irq offload adjusted to not
collide.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2019-12-18 14:12:54 -08:00 • committed by Anas Nashif
commit 077b587447
14 changed files with 63 additions and 50 deletions
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3
arch/x86/core/intel64/fatal.c
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@ -13,6 +13,9 @@ LOG_MODULE_DECLARE(os);
void z_x86_exception(z_arch_esf_t *esf)
{
switch (esf->vector) {
case Z_X86_OOPS_VECTOR:
z_x86_do_kernel_oops(esf);
break;
case IV_PAGE_FAULT:
z_x86_page_fault_handler(esf);
break;