From 071c9dc0f39c953035fa9c7084a0ce120b5e8a54 Mon Sep 17 00:00:00 2001 From: Anas Nashif Date: Mon, 17 Sep 2018 10:39:56 -0500 Subject: [PATCH] soc: logging: move soc tree to new logger Use the new logger framework for soc related code. Signed-off-by: Anas Nashif --- soc/Kconfig | 5 +++++ soc/arm/nordic_nrf/nrf51/soc.c | 3 +++ soc/arm/nordic_nrf/nrf52/power.c | 16 ++++++++-------- soc/arm/nordic_nrf/nrf52/soc.c | 4 ++++ soc/x86/intel_quark/quark_se/Kconfig | 20 -------------------- soc/x86/intel_quark/quark_se/soc.c | 14 +++++++------- soc/xtensa/intel_s1000/soc.c | 18 +++++++++--------- 7 files changed, 36 insertions(+), 44 deletions(-) diff --git a/soc/Kconfig b/soc/Kconfig index cc6a7ee1473..ab0c3810f74 100644 --- a/soc/Kconfig +++ b/soc/Kconfig @@ -10,4 +10,9 @@ menu "Hardware Configuration" osource "$(SOC_DIR)/$(ARCH)/Kconfig" osource "$(SOC_DIR)/$(ARCH)/*/Kconfig" + +module = SOC +module-str = SOC +source "subsys/logging/Kconfig.template.log_config" + endmenu diff --git a/soc/arm/nordic_nrf/nrf51/soc.c b/soc/arm/nordic_nrf/nrf51/soc.c index 36ed1404126..d37d22cc050 100644 --- a/soc/arm/nordic_nrf/nrf51/soc.c +++ b/soc/arm/nordic_nrf/nrf51/soc.c @@ -24,6 +24,9 @@ extern void _NmiInit(void); #endif #include +#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL +#include +LOG_MODULE_REGISTER(soc); static int nordicsemi_nrf51_init(struct device *arg) { diff --git a/soc/arm/nordic_nrf/nrf52/power.c b/soc/arm/nordic_nrf/nrf52/power.c index aedfde933fd..d8641c4bf5e 100644 --- a/soc/arm/nordic_nrf/nrf52/power.c +++ b/soc/arm/nordic_nrf/nrf52/power.c @@ -3,14 +3,14 @@ * * SPDX-License-Identifier: Apache-2.0 */ - -#define SYS_LOG_LEVEL SYS_LOG_LEVEL_DEBUG -#include - #include #include #include +#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL +#include +LOG_MODULE_DECLARE(soc); + #if defined(CONFIG_SYS_POWER_DEEP_SLEEP) /* System_OFF is deepest Power state available, On exiting from this * state CPU including all peripherals reset @@ -48,7 +48,7 @@ static void _low_power_mode(enum power_states state) default: /* Unsupported State */ - SYS_LOG_ERR("Unsupported State\n"); + LOG_ERR("Unsupported State"); break; } @@ -73,7 +73,7 @@ void _sys_soc_set_power_state(enum power_states state) #endif default: /* Unsupported State */ - SYS_LOG_ERR("Unsupported State\n"); + LOG_ERR("Unsupported State"); break; } } @@ -93,7 +93,7 @@ void _sys_soc_power_state_post_ops(enum power_states state) #endif default: /* Unsupported State */ - SYS_LOG_ERR("Unsupported State\n"); + LOG_ERR("Unsupported State"); break; } } @@ -109,7 +109,7 @@ bool _sys_soc_is_valid_power_state(enum power_states state) return true; break; default: - SYS_LOG_DBG("Unsupported State\n"); + LOG_DBG("Unsupported State"); break; } diff --git a/soc/arm/nordic_nrf/nrf52/soc.c b/soc/arm/nordic_nrf/nrf52/soc.c index 369dbaa496b..ffffd1fc5a6 100644 --- a/soc/arm/nordic_nrf/nrf52/soc.c +++ b/soc/arm/nordic_nrf/nrf52/soc.c @@ -36,6 +36,10 @@ extern void _NmiInit(void); #include #include +#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL +#include +LOG_MODULE_REGISTER(soc); + static int nordicsemi_nrf52_init(struct device *arg) { u32_t key; diff --git a/soc/x86/intel_quark/quark_se/Kconfig b/soc/x86/intel_quark/quark_se/Kconfig index c5968b3950d..9ac5a67102f 100644 --- a/soc/x86/intel_quark/quark_se/Kconfig +++ b/soc/x86/intel_quark/quark_se/Kconfig @@ -27,26 +27,6 @@ config ARC_INIT help Allows x86 processor to kickoff the ARC slave processor. -config SYS_LOG_ARC_INIT_LEVEL - int "Quark SE Sensor Subsystem log level" - depends on SYS_LOG - default 0 - help - Sets log level for the boot initialization and boot process of the sensor - sub-system. - - Levels are: - - - 0 OFF, do not write - - - 1 ERROR, only write SYS_LOG_ERR - - - 2 WARNING, write SYS_LOG_WRN in addition to previous level - - - 3 INFO, write SYS_LOG_INF in addition to previous levels - - - 4 DEBUG, write SYS_LOG_DBG in addition to previous levels - config ARC_GDB_ENABLE bool "Allows the usage of GDB with the ARC processor." depends on ARC_INIT diff --git a/soc/x86/intel_quark/quark_se/soc.c b/soc/x86/intel_quark/quark_se/soc.c index 17783647518..a6f59181930 100644 --- a/soc/x86/intel_quark/quark_se/soc.c +++ b/soc/x86/intel_quark/quark_se/soc.c @@ -23,6 +23,9 @@ #include "shared_mem.h" #include +#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL +#include +LOG_MODULE_REGISTER(soc); #ifdef CONFIG_X86_MMU /* loapic */ @@ -50,9 +53,6 @@ MMU_BOOT_REGION(0xB0500000, 256*1024, MMU_ENTRY_WRITE); #define SCSS_REG_VAL(offset) \ (*((volatile u32_t *)(SCSS_REGISTER_BASE+offset))) -#define SYS_LOG_LEVEL CONFIG_SYS_LOG_ARC_INIT_LEVEL -#include - /** * * @brief ARC Init @@ -78,12 +78,12 @@ int _arc_init(struct device *arg) * we read the value and stick it in shared_mem->arc_start which is * the beginning of the address space at 0xA8000000 */ reset_vector = (u32_t *)RESET_VECTOR; - SYS_LOG_DBG("Reset vector address: %x", *reset_vector); + LOG_DBG("Reset vector address: %x", *reset_vector); shared_data->arc_start = *reset_vector; shared_data->flags = 0; if (!shared_data->arc_start) { /* Reset vector points to NULL => skip ARC init. */ - SYS_LOG_DBG("Reset vector is NULL, skipping ARC init."); + LOG_DBG("Reset vector is NULL, skipping ARC init."); goto skip_arc_init; } @@ -92,14 +92,14 @@ int _arc_init(struct device *arg) SCSS_REG_VAL(SCSS_SS_CFG) |= ARC_RUN_REQ_A; #endif - SYS_LOG_DBG("Waiting for arc to start..."); + LOG_DBG("Waiting for arc to start..."); /* Block until the ARC core actually starts up */ while (SCSS_REG_VAL(SCSS_SS_STS) & 0x4000) { } /* Block until ARC's quark_se_init() sets a flag indicating it is ready, * if we get stuck here ARC has run but has exploded very early */ - SYS_LOG_DBG("Waiting for arc to init..."); + LOG_DBG("Waiting for arc to init..."); while (!(shared_data->flags & ARC_READY)) { } diff --git a/soc/xtensa/intel_s1000/soc.c b/soc/xtensa/intel_s1000/soc.c index 8937a2c573c..cebfa58d74c 100644 --- a/soc/xtensa/intel_s1000/soc.c +++ b/soc/xtensa/intel_s1000/soc.c @@ -4,18 +4,18 @@ * SPDX-License-Identifier: Apache-2.0 */ -#define SYS_LOG_LEVEL SYS_LOG_LEVEL_INFO -#define SYS_LOG_DOMAIN "soc/s1000" - #include #include #include -#include #include #include #include #include +#define LOG_LEVEL CONFIG_SOC_LOG_LEVEL +#include +LOG_MODULE_REGISTER(soc); + static u32_t ref_clk_freq; void _soc_irq_enable(u32_t irq) @@ -42,7 +42,7 @@ void _soc_irq_enable(u32_t irq) } if (!dev_cavs) { - SYS_LOG_DBG("board: CAVS device binding failed\n"); + LOG_DBG("board: CAVS device binding failed"); return; } @@ -62,7 +62,7 @@ void _soc_irq_enable(u32_t irq) } if (!dev_ictl) { - SYS_LOG_DBG("board: DW intr_control device binding failed\n"); + LOG_DBG("board: DW intr_control device binding failed"); return; } @@ -101,7 +101,7 @@ void _soc_irq_disable(u32_t irq) } if (!dev_cavs) { - SYS_LOG_DBG("board: CAVS device binding failed\n"); + LOG_DBG("board: CAVS device binding failed"); return; } @@ -125,7 +125,7 @@ void _soc_irq_disable(u32_t irq) } if (!dev_ictl) { - SYS_LOG_DBG("board: DW intr_control device binding failed\n"); + LOG_DBG("board: DW intr_control device binding failed"); return; } @@ -221,7 +221,7 @@ static int soc_init(struct device *dev) soc_read_bootstraps(); ref_clk_freq = soc_get_ref_clk_freq(); - SYS_LOG_INF("Reference clock frequency: %u Hz", ref_clk_freq); + LOG_INF("Reference clock frequency: %u Hz", ref_clk_freq); soc_set_resource_ownership(); soc_set_power_and_clock();