kernel: add k_mem_map() and related defines

This will be the interface for mapping memory in the kernel's
part of the address space, which is guaranteed to be persistent
regardless of what thread is scheduled.

Further code for specifically managing virtual memory will end up in
kernel/mmu.c.

Further defintions for memory management in general will end up
in sys/mem_manage.h.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>

include/sys/mem_manage.h

@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_INCLUDE_SYS_MEM_MANAGE_H
+#define ZEPHYR_INCLUDE_SYS_MEM_MANAGE_H
+
+#include <sys/util.h>
+
+/*
+ * Caching mode definitions. These are mutually exclusive.
+ */
+
+/** No caching. Most drivers want this. */
+#define K_MEM_CACHE_NONE	0
+
+/** Write-through caching. Used by certain drivers. */
+#define K_MEM_CACHE_WT		1
+
+/** Full write-back caching. Any RAM mapped wants this. */
+#define K_MEM_CACHE_WB		2
+
+/** Reserved bits for cache modes in k_map() flags argument */
+#define K_MEM_CACHE_MASK	(BIT(3) - 1)
+
+/*
+ * Region permission attributes. Default is read-only, no user, no exec
+ */
+
+/** Region will have read/write access (and not read-only) */
+#define K_MEM_PERM_RW		BIT(3)
+
+/** Region will be executable (normally forbidden) */
+#define K_MEM_PERM_EXEC		BIT(4)
+
+/** Region will be accessible to user mode (normally supervisor-only) */
+#define K_MEM_PERM_USER		BIT(5)
+
+#ifndef _ASMLANGUAGE
+#include <stdint.h>
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Map a physical memory region into the kernel's virtual address space
+ *
+ * Given a physical address and a size, return a linear address
+ * representing the base of where the physical region is mapped in
+ * the virtual address space for the Zephyr kernel.
+ *
+ * This function alters the active page tables in the area reserved
+ * for the kernel. This function will choose the virtual address
+ * and return it to the caller.
+ *
+ * Portable code should never assume that phys_addr and linear_addr will
+ * be equal.
+ *
+ * Once created, mappings are permanent.
+ *
+ * Caching and access properties are controlled by the 'flags' parameter.
+ * Unused bits in 'flags' are reserved for future expansion.
+ * A caching mode must be selected. By default, the region is read-only
+ * with user access and code execution forbidden. This policy is changed
+ * by passing K_MEM_CACHE_* and K_MEM_PERM_* macros into the 'flags' parameter.
+ *
+ * If there is insufficient virtual address space for the mapping, or
+ * bad flags are passed in, or if additional memory is needed to update
+ * page tables that is not available, this will generate a kernel panic.
+ *
+ * This API is only available if CONFIG_MMU is enabled.
+ *
+ * This API is part of infrastructure still under development and may
+ * change.
+ *
+ * @param linear_addr [out] Output linear address storage location
+ * @param phys_addr Physical address base of the memory region
+ * @param size Size of the memory region
+ * @param flags Caching mode and access flags, see K_MAP_* macros
+ */
+void k_mem_map(uint8_t **linear_addr, uintptr_t phys_addr, size_t size,
+	       uint32_t flags);
+
+/**
+ * Given an arbitrary region, provide a aligned region that covers it
+ *
+ * The returned region will have both its base address and size aligned
+ * to the provided alignment value.
+ *
+ * @param aligned_addr [out] Aligned address
+ * @param aligned_size [out] Aligned region size
+ * @param addr Region base address
+ * @param size Region size
+ * @param align What to align the address and size to
+ * @retval offset between aligned_addr and addr
+ */
+size_t k_mem_region_align(uintptr_t *aligned_addr, size_t *aligned_size,
+			  uintptr_t addr, size_t size, size_t align);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !_ASMLANGUAGE */
+#endif /* ZEPHYR_INCLUDE_SYS_MEM_MANAGE_H */

kernel/CMakeLists.txt

@@ -39,6 +39,7 @@ set_target_properties(
 target_sources_ifdef(CONFIG_STACK_CANARIES        kernel PRIVATE compiler_stack_protect.c)
 target_sources_ifdef(CONFIG_SYS_CLOCK_EXISTS      kernel PRIVATE timeout.c timer.c)
 target_sources_ifdef(CONFIG_ATOMIC_OPERATIONS_C   kernel PRIVATE atomic_c.c)
+target_sources_if_kconfig(                        kernel PRIVATE mmu.c)
 target_sources_if_kconfig(                        kernel PRIVATE poll.c)
 
 if(${CONFIG_MEM_POOL_HEAP_BACKEND})

kernel/mmu.c

@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Routines for managing virtual address spaces
+ */
+
+ #include <stdint.h>
+ #include <kernel_arch_interface.h>
+ #include <spinlock.h>
+
+#define LOG_LEVEL CONFIG_KERNEL_LOG_LEVEL
+#include <logging/log.h>
+LOG_MODULE_DECLARE(os);
+
+/* Spinlock to protect any globals in this file and serialize page table
+ * updates in arch code
+ */
+static struct k_spinlock mm_lock;
+
+size_t k_mem_region_align(uintptr_t *aligned_addr, size_t *aligned_size,
+			  uintptr_t phys_addr, size_t size, size_t align)
+{
+	size_t addr_offset;
+
+	/* The actual mapped region must be page-aligned. Round down the
+	 * physical address and pad the region size appropriately
+	 */
+	*aligned_addr = ROUND_DOWN(phys_addr, align);
+	addr_offset = phys_addr - *aligned_addr;
+	*aligned_size = ROUND_UP(size + addr_offset, align);
+
+	return addr_offset;
+}
+
+void k_mem_map(uint8_t **virt_addr, uintptr_t phys_addr, size_t size,
+	       uint32_t flags)
+{
+	uintptr_t aligned_addr, addr_offset;
+	size_t aligned_size;
+	int ret;
+	k_spinlock_key_t key;
+	uint8_t *dest_virt;
+
+	addr_offset = k_mem_region_align(&aligned_addr, &aligned_size,
+					 phys_addr, size,
+					 CONFIG_MMU_PAGE_SIZE);
+
+	/* Carve out some unused virtual memory from the top of the
+	 * address space
+	 */
+	key = k_spin_lock(&mm_lock);
+
+	/* TODO: For now, do an identity mapping, we haven't implemented
+	 * virtual memory yet
+	 */
+	dest_virt = (uint8_t *)aligned_addr;
+
+	LOG_DBG("arch_mem_map(%p, 0x%lx, %zu, %x) offset %lu\n", dest_virt,
+		aligned_addr, aligned_size, flags, addr_offset);
+	__ASSERT(dest_virt != NULL, "NULL memory mapping");
+	__ASSERT(aligned_size != 0, "0-length mapping at 0x%lx", aligned_addr);
+	ret = arch_mem_map(dest_virt, aligned_addr, aligned_size, flags);
+	k_spin_unlock(&mm_lock, key);
+
+	if (ret == 0) {
+		*virt_addr = dest_virt + addr_offset;
+	} else {
+		/* This happens if there is an insurmountable problem
+		 * with the selected cache modes or access flags
+		 * with no safe fallback
+		 */
+
+		LOG_ERR("arch_mem_map() to %p returned %d", dest_virt, ret);
+		goto fail;
+	}
+	return;
+fail:
+	LOG_ERR("memory mapping 0x%lx (size %zu, flags 0x%x) failed",
+		phys_addr, size, flags);
+	k_panic();
+}