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soc: nxp: rt: kconfig: Clean up INIT_ENET_PLL handling

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Move the definition of INIT_ENET_PLL to soc/arm/nxp_imx/rt/Kconfig.soc,
which is where the other INIT_*_PLL symbols are defined, and consistenly
enable it with 'select' like for the other symbols, instead of via
Kconfig.defconfig.mimxrt{1052,1062,1064}.

Remove an old empty INIT_ENET_PLL definition from
soc/arm/nxp_imx/rt/Kconfig.defconfig.series, which was just there to
hack around a dependency on NET_L2_ETHERNET. If the symbol does not
depend on NET_L2_ETHERNET in all cases, it's better to not add the
dependency.

Also add a help text to hint what's going on there.

Found with a script (INIT_ENET_PLL was only defined in Kconfig.defconfig
files).

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This commit is contained in:
Ulf Magnusson 2019-10-25 09:50:49 +02:00 • committed by Kumar Gala
commit 063f311ac6
5 changed files with 10 additions and 23 deletions
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7
soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1052
View file

@ -25,11 +25,4 @@ config IPG_DIV
config GPIO
default y
if NET_L2_ETHERNET
config INIT_ENET_PLL
def_bool y
endif # NET_L2_ETHERNET
endif # SOC_MIMXRT1052

7
soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1062
View file

@ -25,11 +25,4 @@ config IPG_DIV
config GPIO
default y
if NET_L2_ETHERNET
config INIT_ENET_PLL
def_bool y
endif # NET_L2_ETHERNET
endif # SOC_MIMXRT1062

7
soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1064
View file

@ -25,11 +25,4 @@ config IPG_DIV
config GPIO
default y
if NET_L2_ETHERNET
config INIT_ENET_PLL
def_bool y
endif # NET_L2_ETHERNET
endif # SOC_MIMXRT1064

2
soc/arm/nxp_imx/rt/Kconfig.defconfig.series
View file

@ -13,8 +13,6 @@ config SOC_SERIES
config TEXT_SECTION_OFFSET
default 0x2000 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR
config INIT_ENET_PLL
if CLOCK_CONTROL
config CLOCK_CONTROL_MCUX_CCM

10
soc/arm/nxp_imx/rt/Kconfig.soc
View file

@ -91,6 +91,7 @@ config SOC_MIMXRT1052
select INIT_SYS_PLL
select INIT_USB1_PLL
select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF
select INIT_ENET_PLL if NET_L2_ETHERNET
select HAS_MCUX_USB_EHCI
select HAS_MCUX_USDHC1
select HAS_MCUX_USDHC2
@ -136,6 +137,7 @@ config SOC_MIMXRT1062
select INIT_SYS_PLL
select INIT_USB1_PLL
select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF
select INIT_ENET_PLL if NET_L2_ETHERNET
select HAS_MCUX_USB_EHCI
select HAS_MCUX_USDHC1
select HAS_MCUX_USDHC2
@ -160,6 +162,7 @@ config SOC_MIMXRT1064
select INIT_SYS_PLL
select INIT_USB1_PLL
select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF
select INIT_ENET_PLL if NET_L2_ETHERNET
select HAS_MCUX_USB_EHCI
select HAS_MCUX_USDHC1
select HAS_MCUX_USDHC2
@ -268,6 +271,13 @@ config INIT_USB1_PLL
config INIT_VIDEO_PLL
bool "Initialize Video PLL"
config INIT_ENET_PLL
bool
help
If y, the Ethernet PLL is initialized. Always enabled on e.g.
MIMXRT1021 - see commit 17f4d6bec7 ("soc: nxp_imx: fix ENET_PLL selection
for MIMXRT1021").
config ARM_DIV
int "ARM clock divider"
range 0 7