From 0619e96e87b13f84afb24b8085bff406746f7e8d Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Tue, 10 Aug 2021 14:31:30 +0200 Subject: [PATCH] boards: fvp_base_revc_2xaemv8a: reserve HEAP for GICv3 ITS tables The ITS needs a number of table, so HEAP must be reserved for runtime allocation (1MiB is a round and convenient value): - Redistributor: * 64K table for all redistributors * 64k for each redistributors - ITS: * 4K collection table aligned on 4K * 4K x 128 device table aligned on 4K This makes 11x64K to permit all allocations to success. Note, will need 64K HEAP_MEM per CPUs added. This doesn't necessarily include the Interrupt Translation Table, which are 256bytes aligned tables, for reference a 32 ITEs table needs 256bytes. With 14x64K HEAP, up to 116 ITT tables of 32 ITEs can be allocated. A specific HEAP_MEM_POOL_SIZE as been added to arm64_gicv3_its test for the fvp_base_revc_2xaemv8a board to satisfy all memory allocation constraints for 256 ITT tables with 32 ITEs allocations. Signed-off-by: Neil Armstrong --- boards/arm64/fvp_base_revc_2xaemv8a/Kconfig | 18 ++++++++++++++++++ .../boards/fvp_base_revc_2xaemv8a.conf | 15 +++++++++++++++ 2 files changed, 33 insertions(+) create mode 100644 boards/arm64/fvp_base_revc_2xaemv8a/Kconfig create mode 100644 tests/arch/arm64/arm64_gicv3_its/boards/fvp_base_revc_2xaemv8a.conf diff --git a/boards/arm64/fvp_base_revc_2xaemv8a/Kconfig b/boards/arm64/fvp_base_revc_2xaemv8a/Kconfig new file mode 100644 index 00000000000..8059b39fe90 --- /dev/null +++ b/boards/arm64/fvp_base_revc_2xaemv8a/Kconfig @@ -0,0 +1,18 @@ +# Copyright (c) 2021 BayLibre SAS +# SPDX-License-Identifier: Apache-2.0 + +# The GICv3 & ITS drivers allocation needs are: +# - LPI prop table: global 1x64K aligned on 64K +# - LPI pend table: for each redistributor/cpu 1x64K aligned on 64K +# - Devices table: 128x4K aligned on 4K +# - Interrupt Collections table: 1x4K aligned on 4K +# +# This makes 11x64K to permit all allocations to success. +# +# Note, will need 64K HEAP_MEM per CPUs added. +# +# This doesn't necessarily include the Interrupt Translation Table, which are +# 256bytes aligned tables, for reference a 32 ITEs table needs 256bytes. +# With 11x64K HEAP, up to 116 ITT tables of 32 ITEs can be allocated. +config HEAP_MEM_POOL_SIZE + default 720896 if GIC_V3_ITS diff --git a/tests/arch/arm64/arm64_gicv3_its/boards/fvp_base_revc_2xaemv8a.conf b/tests/arch/arm64/arm64_gicv3_its/boards/fvp_base_revc_2xaemv8a.conf new file mode 100644 index 00000000000..aa094e60d11 --- /dev/null +++ b/tests/arch/arm64/arm64_gicv3_its/boards/fvp_base_revc_2xaemv8a.conf @@ -0,0 +1,15 @@ +# The GICv3 & ITS drivers allocation needs are: +# - LPI prop table: global 1x64K aligned on 64K +# - LPI pend table: for each redistributor/cpu 1x64K aligned on 64K +# - Devices table: 128x4K aligned on 4K +# - Interrupt Collections table: 1x4K aligned on 4K +# +# This makes 11x64K to permit all allocations to success. +# +# Note, will need 64K HEAP_MEM per CPUs added. +# +# This doesn't necessarely include the Interrupt Translation Table, which are +# 256bytes aligned tables, for reference a 32 ITEs table needs 256bytes. +# +# To permit allocating 256 ITT tables of 32 ITEs, 13x64K HEAP_MEM is needed +CONFIG_HEAP_MEM_POOL_SIZE=851968