From 058aa0d669661bdabb5e989ac32f7d12d45054a9 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Mon, 28 Mar 2022 16:42:32 +0200 Subject: [PATCH] tests/drivers/clock_control: stm32: Remove prescalers from overlays Test doesn't do any check on prescalers. Remove references and existing user: wx_clear_clocks overlay. Proceed to new factorization when possible. Signed-off-by: Erwan Gouriou --- .../stm32_common/boards/clear_clocks.overlay | 2 + .../boards/f1_pll_64_hse_8.overlay | 1 - .../boards/f1_pll_64_hsi_8.overlay | 1 - .../stm32_common/boards/msi_range6.overlay | 1 - .../boards/wb_pll_48_hsi_16.overlay | 3 -- .../boards/wb_pll_48_msi_4.overlay | 3 -- .../boards/wb_pll_64_hse_32.overlay | 3 -- .../boards/wx_clear_clocks.overlay | 42 ------------------- .../stm32_common/testcase.yaml | 26 +++++------- 9 files changed, 12 insertions(+), 70 deletions(-) delete mode 100644 tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wx_clear_clocks.overlay diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/clear_clocks.overlay b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/clear_clocks.overlay index 88527d68c5b..f64916a4c1c 100644 --- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/clear_clocks.overlay +++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/clear_clocks.overlay @@ -13,6 +13,8 @@ status = "disabled"; /delete-property/ hse-bypass; /delete-property/ clock-frequency; + /delete-property/ hse-tcxo; + /delete-property/ hse-div2; }; &clk_hsi { diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/f1_pll_64_hse_8.overlay b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/f1_pll_64_hse_8.overlay index 76022ebe2da..b4cb8b94c26 100644 --- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/f1_pll_64_hse_8.overlay +++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/f1_pll_64_hse_8.overlay @@ -25,5 +25,4 @@ &rcc { clocks = <&pll>; clock-frequency = ; - /* apb1 prescaler is kept = 2 */ }; diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/f1_pll_64_hsi_8.overlay b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/f1_pll_64_hsi_8.overlay index b7f7083bdca..21e9bc8b67e 100644 --- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/f1_pll_64_hsi_8.overlay +++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/f1_pll_64_hsi_8.overlay @@ -22,5 +22,4 @@ &rcc { clocks = <&pll>; clock-frequency = ; - /* apb1 prescaler is kept = 2 */ }; diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/msi_range6.overlay b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/msi_range6.overlay index bb3994d6318..6372fdaf390 100644 --- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/msi_range6.overlay +++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/msi_range6.overlay @@ -17,5 +17,4 @@ &rcc { clocks = <&clk_msi>; clock-frequency = <4194304>; - ahb-prescaler = <1>; }; diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wb_pll_48_hsi_16.overlay b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wb_pll_48_hsi_16.overlay index b1ae774bad0..3b5c64f50db 100644 --- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wb_pll_48_hsi_16.overlay +++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wb_pll_48_hsi_16.overlay @@ -28,7 +28,4 @@ &rcc { clocks = <&pll>; clock-frequency = ; - cpu1-prescaler = <1>; - cpu2-prescaler = <2>; - ahb4-prescaler = <2>; }; diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wb_pll_48_msi_4.overlay b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wb_pll_48_msi_4.overlay index d75e49024fb..6f93090fbb9 100644 --- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wb_pll_48_msi_4.overlay +++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wb_pll_48_msi_4.overlay @@ -28,7 +28,4 @@ &rcc { clocks = <&pll>; clock-frequency = ; - cpu1-prescaler = <1>; - cpu2-prescaler = <2>; - ahb4-prescaler = <2>; }; diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wb_pll_64_hse_32.overlay b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wb_pll_64_hse_32.overlay index 111eeb2f06d..894692505ba 100644 --- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wb_pll_64_hse_32.overlay +++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wb_pll_64_hse_32.overlay @@ -28,7 +28,4 @@ &rcc { clocks = <&pll>; clock-frequency = ; - cpu1-prescaler = <1>; - cpu2-prescaler = <2>; - ahb4-prescaler = <2>; }; diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wx_clear_clocks.overlay b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wx_clear_clocks.overlay deleted file mode 100644 index c12008d2f5a..00000000000 --- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/boards/wx_clear_clocks.overlay +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (c) 2022 STMicroelectronics - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/* - * Warning: This overlay clears clocks back to a state equivalent to what could - * be found in stm32wl.dtsi - */ - -&clk_hse { - status = "disabled"; - /delete-property/ hse-tcxo; - /delete-property/ hse-div2; - /delete-property/ clock-frequency; -}; - -&clk_hsi { - status = "disabled"; - /delete-property/ hsi-div; -}; - -&clk_msi { - status = "disabled"; - /delete-property/ msi-range; -}; - -&pll { - /delete-property/ div-m; - /delete-property/ mul-n; - /delete-property/ div-p; - /delete-property/ div-q; - /delete-property/ div-r; - /delete-property/ clocks; - status = "disabled"; -}; - -&rcc { - /delete-property/ clocks; - /delete-property/ clock-frequency; -}; diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/testcase.yaml b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/testcase.yaml index 42262a8c2f4..dfbcb952a0d 100644 --- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/testcase.yaml +++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common/testcase.yaml @@ -13,12 +13,12 @@ tests: drivers.stm32_clock_configuration.common.l4_l5.sysclksrc_pll_64_hsi_16: extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/pll_64_hsi_16.overlay" platform_allow: disco_l475_iot1 nucleo_l4r5zi stm32l562e_dk - drivers.stm32_clock_configuration.common.l4_l5.sysclksrc_hsi_16: + drivers.stm32_clock_configuration.common.sysclksrc_hsi_16: extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/hsi_16.overlay" - platform_allow: disco_l475_iot1 nucleo_l4r5zi stm32l562e_dk + platform_allow: disco_l475_iot1 nucleo_l4r5zi stm32l562e_dk nucleo_wb55rg nucleo_wl55jc drivers.stm32_clock_configuration.common.sysclksrc_msi_48: extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/msi_range11.overlay" - platform_allow: disco_l475_iot1 nucleo_l4r5zi stm32l562e_dk nucleo_l152re nucleo_l073rz + platform_allow: disco_l475_iot1 nucleo_l4r5zi stm32l562e_dk nucleo_l152re nucleo_l073rz nucleo_wl55jc nucleo_wb55rg drivers.stm32_clock_configuration.common.l4_l5.sysclksrc_hse_8.fixup: extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/clear_msi.overlay;boards/hse_8.overlay" platform_allow: disco_l475_iot1 nucleo_l4r5zi stm32l562e_dk @@ -58,32 +58,26 @@ tests: drivers.stm32_clock_configuration.common.l0_l1.sysclksrc_msi_range6: extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/msi_range6.overlay" platform_allow: nucleo_l152re nucleo_l073rz - drivers.stm32_clock_configuration.common.wx.sysclksrc_msi_48: - extra_args: DTC_OVERLAY_FILE="boards/wx_clear_clocks.overlay;boards/msi_range11.overlay" - platform_allow: nucleo_wl55jc nucleo_wb55rg - drivers.stm32_clock_configuration.common.wx.sysclksrc_hsi_16: - extra_args: DTC_OVERLAY_FILE="boards/wx_clear_clocks.overlay;boards/hsi_16.overlay" - platform_allow: nucleo_wb55rg nucleo_wl55jc drivers.stm32_clock_configuration.common.wl.sysclksrc_pll_48_hsi_16: - extra_args: DTC_OVERLAY_FILE="boards/wx_clear_clocks.overlay;boards/pll_48_hsi_16.overlay" + extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_48_hsi_16.overlay" platform_allow: nucleo_wl55jc drivers.stm32_clock_configuration.common.wl.sysclksrc_pll_48_hse_32: - extra_args: DTC_OVERLAY_FILE="boards/wx_clear_clocks.overlay;boards/wl_pll_48_hse_32.overlay" + extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/wl_pll_48_hse_32.overlay" platform_allow: nucleo_wl55jc drivers.stm32_clock_configuration.common.wl.sysclksrc_hse_32: - extra_args: DTC_OVERLAY_FILE="boards/wx_clear_clocks.overlay;boards/wl_32_hse.overlay" + extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/wl_32_hse.overlay" platform_allow: nucleo_wl55jc drivers.stm32_clock_configuration.common.wb.sysclksrc_hse_32: - extra_args: DTC_OVERLAY_FILE="boards/wx_clear_clocks.overlay;boards/hse_32.overlay" + extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/hse_32.overlay" platform_allow: nucleo_wb55rg drivers.stm32_clock_configuration.common.wb.sysclksrc_pll_48_hsi_16: - extra_args: DTC_OVERLAY_FILE="boards/wx_clear_clocks.overlay;boards/wb_pll_48_hsi_16.overlay" + extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/wb_pll_48_hsi_16.overlay" platform_allow: nucleo_wb55rg drivers.stm32_clock_configuration.common.wb.sysclksrc_pll_64_hse_32: - extra_args: DTC_OVERLAY_FILE="boards/wx_clear_clocks.overlay;boards/wb_pll_64_hse_32.overlay" + extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/wb_pll_64_hse_32.overlay" platform_allow: nucleo_wb55rg drivers.stm32_clock_configuration.common.wb.sysclksrc_pll_48_msi_4: - extra_args: DTC_OVERLAY_FILE="boards/wx_clear_clocks.overlay;boards/wb_pll_48_msi_4.overlay" + extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/wb_pll_48_msi_4.overlay" platform_allow: nucleo_wb55rg drivers.stm32_clock_configuration.common.f0_f3.sysclksrc_hsi_8: extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/hsi_8.overlay"