drivers: gpio_pca95xx: update cache after successful write
Only update the internal register cache after successful write, or else it would get out of sync with hardware. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
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1c474e5364
commit
04db241fb7
1 changed files with 82 additions and 42 deletions
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@ -122,11 +122,13 @@ static int read_port_regs(struct device *dev, u8_t reg, u16_t *buf)
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*
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* @param dev Device struct of the PCA95XX.
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* @param reg Register to write into (the PORT0 of the pair of registers).
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* @param buf Buffer to write data from.
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* @param cache Pointer to the cache to be updated after successful write.
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* @param value New value to set.
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*
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* @return 0 if successful, failed otherwise.
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*/
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static int write_port_regs(struct device *dev, u8_t reg, u16_t *buf)
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static int write_port_regs(struct device *dev, u8_t reg,
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u16_t *cache, u16_t value)
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{
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const struct gpio_pca95xx_config * const config =
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dev->config->config_info;
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@ -138,14 +140,16 @@ static int write_port_regs(struct device *dev, u8_t reg, u16_t *buf)
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int ret;
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LOG_DBG("PCA95XX[0x%X]: Write: REG[0x%X] = 0x%X, REG[0x%X] = "
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"0x%X", i2c_addr, reg, (*buf & 0xFF), (reg + 1),
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(*buf >> 8));
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"0x%X", i2c_addr, reg, (value & 0xFF),
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(reg + 1), (value >> 8));
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port_data = sys_cpu_to_le16(*buf);
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port_data = sys_cpu_to_le16(value);
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ret = i2c_burst_write(i2c_master, i2c_addr, reg,
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(u8_t *)&port_data, sizeof(port_data));
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if (ret != 0) {
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if (ret == 0) {
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*cache = value;
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} else {
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LOG_ERR("PCA95XX[0x%X]: error writing to register 0x%X "
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"(%d)", i2c_addr, reg, ret);
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}
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@ -153,6 +157,42 @@ static int write_port_regs(struct device *dev, u8_t reg, u16_t *buf)
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return ret;
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}
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static inline int update_output_regs(struct device *dev, u16_t value)
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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return write_port_regs(dev, REG_OUTPUT_PORT0,
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&drv_data->reg_cache.output, value);
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}
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static inline int update_direction_regs(struct device *dev, u16_t value)
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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return write_port_regs(dev, REG_CONF_PORT0,
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&drv_data->reg_cache.dir, value);
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}
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static inline int update_pul_sel_regs(struct device *dev, u16_t value)
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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return write_port_regs(dev, REG_PUD_SEL_PORT0,
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&drv_data->reg_cache.pud_sel, value);
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}
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static inline int update_pul_en_regs(struct device *dev, u16_t value)
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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return write_port_regs(dev, REG_PUD_EN_PORT0,
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&drv_data->reg_cache.pud_en, value);
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}
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/**
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* @brief Setup the pin direction (input or output)
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*
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@ -168,8 +208,8 @@ static int setup_pin_dir(struct device *dev, int access_op,
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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u16_t *reg_dir = &drv_data->reg_cache.dir;
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u16_t *reg_out = &drv_data->reg_cache.output;
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u16_t reg_dir = drv_data->reg_cache.dir;
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u16_t reg_out = drv_data->reg_cache.output;
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int ret;
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/* For each pin, 0 == output, 1 == input */
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@ -177,26 +217,26 @@ static int setup_pin_dir(struct device *dev, int access_op,
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case GPIO_ACCESS_BY_PIN:
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if ((flags & GPIO_OUTPUT) != 0U) {
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0U) {
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*reg_out |= BIT(pin);
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reg_out |= BIT(pin);
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0U) {
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*reg_out &= ~BIT(pin);
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reg_out &= ~BIT(pin);
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}
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*reg_dir &= ~BIT(pin);
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reg_dir &= ~BIT(pin);
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} else {
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*reg_dir |= BIT(pin);
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reg_dir |= BIT(pin);
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}
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break;
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case GPIO_ACCESS_BY_PORT:
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if ((flags & GPIO_OUTPUT) != 0U) {
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0U) {
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*reg_out = 0xFFFF;
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reg_out = 0xFFFF;
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0U) {
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*reg_out = 0x0;
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reg_out = 0x0;
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}
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*reg_dir = 0x0;
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reg_dir = 0x0;
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} else {
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*reg_dir = 0xFFFF;
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reg_dir = 0xFFFF;
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}
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break;
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@ -205,12 +245,12 @@ static int setup_pin_dir(struct device *dev, int access_op,
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goto done;
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}
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ret = write_port_regs(dev, REG_OUTPUT_PORT0, reg_out);
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ret = update_output_regs(dev, reg_out);
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if (ret != 0) {
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goto done;
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}
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ret = write_port_regs(dev, REG_CONF_PORT0, reg_dir);
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ret = update_direction_regs(dev, reg_dir);
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done:
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return ret;
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@ -233,7 +273,7 @@ static int setup_pin_pullupdown(struct device *dev, int access_op,
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dev->config->config_info;
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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u16_t *reg_pud;
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u16_t reg_pud;
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u16_t bit_mask;
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u16_t new_value = 0U;
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int ret;
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@ -261,7 +301,7 @@ static int setup_pin_pullupdown(struct device *dev, int access_op,
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}
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/* Setup pin pull up or pull down */
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reg_pud = &drv_data->reg_cache.pud_sel;
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reg_pud = drv_data->reg_cache.pud_sel;
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switch (access_op) {
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case GPIO_ACCESS_BY_PIN:
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bit_mask = 1 << pin;
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@ -271,16 +311,16 @@ static int setup_pin_pullupdown(struct device *dev, int access_op,
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new_value = 1 << pin;
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}
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*reg_pud &= ~bit_mask;
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*reg_pud |= new_value;
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reg_pud &= ~bit_mask;
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reg_pud |= new_value;
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break;
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case GPIO_ACCESS_BY_PORT:
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/* pull down == 0, pull up == 1*/
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if ((flags & GPIO_PULL_UP) != 0U) {
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*reg_pud = 0xFFFF;
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reg_pud = 0xFFFF;
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} else {
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*reg_pud = 0x0;
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reg_pud = 0x0;
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}
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break;
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default:
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@ -288,14 +328,14 @@ static int setup_pin_pullupdown(struct device *dev, int access_op,
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goto done;
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}
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ret = write_port_regs(dev, REG_PUD_SEL_PORT0, reg_pud);
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ret = update_pul_sel_regs(dev, reg_pud);
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if (ret) {
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goto done;
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}
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en_dis:
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/* enable/disable pull up/down */
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reg_pud = &drv_data->reg_cache.pud_en;
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reg_pud = drv_data->reg_cache.pud_en;
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switch (access_op) {
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case GPIO_ACCESS_BY_PIN:
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bit_mask = 1 << pin;
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@ -304,15 +344,15 @@ en_dis:
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new_value = 1 << pin;
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}
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*reg_pud &= ~bit_mask;
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*reg_pud |= new_value;
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reg_pud &= ~bit_mask;
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reg_pud |= new_value;
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break;
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case GPIO_ACCESS_BY_PORT:
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if ((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) != 0U) {
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*reg_pud = 0xFFFF;
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reg_pud = 0xFFFF;
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} else {
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*reg_pud = 0x0;
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reg_pud = 0x0;
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}
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break;
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default:
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@ -320,7 +360,7 @@ en_dis:
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goto done;
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}
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ret = write_port_regs(dev, REG_PUD_EN_PORT0, reg_pud);
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ret = update_pul_en_regs(dev, reg_pud);
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done:
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return ret;
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@ -392,27 +432,27 @@ static int gpio_pca95xx_write(struct device *dev, int access_op,
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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u16_t *reg_out = &drv_data->reg_cache.output;
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u16_t reg_out = drv_data->reg_cache.output;
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int ret;
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/* Invert input value for pins configurated as active low. */
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switch (access_op) {
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case GPIO_ACCESS_BY_PIN:
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if (value) {
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*reg_out |= BIT(pin);
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reg_out |= BIT(pin);
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} else {
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*reg_out &= ~BIT(pin);
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reg_out &= ~BIT(pin);
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}
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break;
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case GPIO_ACCESS_BY_PORT:
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*reg_out = value;
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reg_out = value;
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break;
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default:
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ret = -ENOTSUP;
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goto done;
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}
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ret = write_port_regs(dev, REG_OUTPUT_PORT0, reg_out);
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ret = update_output_regs(dev, reg_out);
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done:
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return ret;
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@ -476,11 +516,11 @@ static int gpio_pca95xx_port_set_masked_raw(struct device *dev,
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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u16_t *reg_out = &drv_data->reg_cache.output;
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u16_t reg_out = drv_data->reg_cache.output;
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*reg_out = (*reg_out & ~mask) | (mask & value);
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reg_out = (reg_out & ~mask) | (mask & value);
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return write_port_regs(dev, REG_OUTPUT_PORT0, reg_out);
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return update_output_regs(dev, reg_out);
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}
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static int gpio_pca95xx_port_set_bits_raw(struct device *dev, u32_t mask)
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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u16_t *reg_out = &drv_data->reg_cache.output;
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u16_t reg_out = drv_data->reg_cache.output;
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*reg_out ^= mask;
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reg_out ^= mask;
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return write_port_regs(dev, REG_OUTPUT_PORT0, reg_out);
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return update_output_regs(dev, reg_out);
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}
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static int gpio_pca95xx_pin_interrupt_configure(struct device *dev,
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