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dts: bindings: renamed binding used for pit

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Renamed pit binding from nxp,kinetis-pit
to nxp,pit

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
This commit is contained in:
Emilio Benavente 2024-02-01 16:12:06 -06:00 • committed by David Leach
commit 04b240c830
13 changed files with 53 additions and 25 deletions
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28
doc/releases/migration-guide-3.7.rst
View file

@ -40,6 +40,34 @@ zcbor
Device Drivers and Devicetree
*****************************
* The :dtcompatible:`nxp,kinetis-pit` pit driver has changed it's compatible
to :dtcompatible:`nxp,pit` and has been updated to support multiple channels.
To configure the individual channels, you must add a child node with the
compatible :dtcompatible:`nxp,pit-channel` and configure as below.
The :kconfig:option:`CONFIG_COUNTER_MCUX_PIT` has also been renamed to
:kconfig:option:`CONFIG_COUNTER_NXP_PIT` with regards to the renaming
of the binding for the pit.
example:
.. code-block:: devicetree
/ {
pit0: pit@40037000 {
/* Other Pit DT Attributes */
compatible = "nxp,pit";
status = "disabled";
num-channels = <1>;
#address-cells = <1>;
#size-cells = <0>;
pit0_channel0: pit0_channel@0 {
compatible = "nxp,pit-channel";
reg = <0>;
status = "disabled";
};
};
Analog-to-Digital Converter (ADC)
=================================

2
drivers/counter/CMakeLists.txt
View file

@ -33,7 +33,7 @@ zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_LPTMR counter_mcux_lpt
zephyr_library_sources_ifdef(CONFIG_COUNTER_MAXIM_DS3231 maxim_ds3231.c)
zephyr_library_sources_ifdef(CONFIG_COUNTER_NATIVE_POSIX counter_native_posix.c)
zephyr_library_sources_ifdef(CONFIG_USERSPACE counter_handlers.c)
zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_PIT counter_mcux_pit.c)
zephyr_library_sources_ifdef(CONFIG_COUNTER_NXP_PIT counter_nxp_pit.c)
zephyr_library_sources_ifdef(CONFIG_COUNTER_XLNX_AXI_TIMER counter_xlnx_axi_timer.c)
zephyr_library_sources_ifdef(CONFIG_COUNTER_TMR_ESP32 counter_esp32_tmr.c)
zephyr_library_sources_ifdef(CONFIG_COUNTER_RTC_ESP32 counter_esp32_rtc.c)

2
drivers/counter/Kconfig
View file

@ -68,7 +68,7 @@ source "drivers/counter/Kconfig.maxim_ds3231"
source "drivers/counter/Kconfig.native_posix"
source "drivers/counter/Kconfig.mcux_pit"
source "drivers/counter/Kconfig.nxp_pit"
source "drivers/counter/Kconfig.xlnx"

11
drivers/counter/Kconfig.mcux_pit
View file

@ -1,11 +0,0 @@
# MCUXpresso SDK Periodic Interrupt Timer (PIT)
# Copyright 2020 NXP
# SPDX-License-Identifier: Apache-2.0
config COUNTER_MCUX_PIT
bool "MCUX PIT driver"
default y
depends on DT_HAS_NXP_KINETIS_PIT_ENABLED
help
Enable support for the MCUX Periodic Interrupt Timer (PIT).

11
drivers/counter/Kconfig.nxp_pit Normal file
View file

@ -0,0 +1,11 @@
# MCUXpresso SDK Periodic Interrupt Timer (PIT)
# Copyright 2020 NXP
# SPDX-License-Identifier: Apache-2.0
config COUNTER_NXP_PIT
bool "NXP PIT driver"
default y
depends on DT_HAS_NXP_PIT_ENABLED
help
Enable support for the NXP Periodic Interrupt Timer (PIT).

2
drivers/counter/counter_mcux_pit.c → drivers/counter/counter_nxp_pit.c
View file

@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_kinetis_pit
#define DT_DRV_COMPAT nxp_pit
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/clock_control.h>

2
dts/arm/nxp/nxp_k6x.dtsi
View file

@ -527,7 +527,7 @@
};
pit0: pit@40037000 {
compatible = "nxp,kinetis-pit";
compatible = "nxp,pit";
reg = <0x40037000 0x1000>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x103c 23>;
interrupts = <48 0>, <49 0>, <50 0>, <51 0>;

2
dts/arm/nxp/nxp_k8x.dtsi
View file

@ -387,7 +387,7 @@
};
pit0: pit@40037000 {
compatible = "nxp,kinetis-pit";
compatible = "nxp,pit";
reg = <0x40037000 0x1000>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x103c 23>;
interrupts = <48 0>, <49 0>, <50 0>, <51 0>;

2
dts/arm/nxp/nxp_s32z27x_rtu0_r52.dtsi
View file

@ -89,7 +89,7 @@
};
pit0: pit@76150000 {
compatible = "nxp,kinetis-pit";
compatible = "nxp,pit";
reg = <0x76150000 0x10000>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
clocks = <&clock NXP_S32_P0_REG_INTF_CLK>;

2
dts/arm/nxp/nxp_s32z27x_rtu1_r52.dtsi
View file

@ -89,7 +89,7 @@
};
pit0: pit@76950000 {
compatible = "nxp,kinetis-pit";
compatible = "nxp,pit";
reg = <0x76950000 0x10000>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
clocks = <&clock NXP_S32_P1_REG_INTF_CLK>;

8
dts/bindings/rtc/nxp,kinetis-pit.yaml → dts/bindings/counter/nxp,pit.yaml
View file

@ -1,11 +1,11 @@
# Copyright 2020,2023 NXP
# Copyright 2020,2023-2024 NXP
# SPDX-License-Identifier: Apache-2.0
description: NXP MCUX Periodic Interrupt Timer (PIT)
description: NXP Periodic Interrupt Timer (PIT)
compatible: "nxp,kinetis-pit"
compatible: "nxp,pit"
include: [rtc.yaml]
include: base.yaml
properties:
reg:

4
tests/drivers/counter/counter_basic_api/src/test_counter.c
View file

@ -84,8 +84,8 @@ static const struct device *const devices[] = {
#ifdef CONFIG_COUNTER_GECKO_STIMER
DEVS_FOR_DT_COMPAT(silabs_gecko_stimer)
#endif
#ifdef CONFIG_COUNTER_MCUX_PIT
DEVS_FOR_DT_COMPAT(nxp_kinetis_pit)
#ifdef CONFIG_COUNTER_NXP_PIT
DEVS_FOR_DT_COMPAT(nxp_pit)
#endif
#ifdef CONFIG_COUNTER_XLNX_AXI_TIMER
DEVS_FOR_DT_COMPAT(xlnx_xps_timer_1_00_a)

2
west.yml
View file

@ -193,7 +193,7 @@ manifest:
groups:
- hal
- name: hal_nxp
revision: c5a56361f3e4968a4d1eaa6f91761550b7d81e70
revision: ef5060421fdba7bd86f98e50dc15db9a5c4c1b53
path: modules/hal/nxp
groups:
- hal