intel_s1000: implement z_soc_irq_is_enabled()
This provides an implemention for z_soc_irq_is_enabled() as it is needed for multi-level interrupts. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
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984002de6d
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04ae38085c
2 changed files with 54 additions and 0 deletions
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@ -147,6 +147,59 @@ void z_soc_irq_disable(u32_t irq)
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}
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}
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int z_soc_irq_is_enabled(unsigned int irq)
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{
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struct device *dev_cavs, *dev_ictl;
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int ret = -EINVAL;
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switch (XTENSA_IRQ_NUMBER(irq)) {
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case DT_CAVS_ICTL_0_IRQ:
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dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_0_NAME);
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break;
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case DT_CAVS_ICTL_1_IRQ:
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dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_1_NAME);
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break;
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case DT_CAVS_ICTL_2_IRQ:
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dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_2_NAME);
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break;
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case DT_CAVS_ICTL_3_IRQ:
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dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_3_NAME);
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break;
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default:
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/* regular interrupt */
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ret = z_xtensa_irq_is_enabled(XTENSA_IRQ_NUMBER(irq));
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goto out;
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}
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if (!dev_cavs) {
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LOG_DBG("board: CAVS device binding failed");
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ret = -ENODEV;
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goto out;
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}
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switch (CAVS_IRQ_NUMBER(irq)) {
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case DW_ICTL_IRQ_CAVS_OFFSET:
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dev_ictl = device_get_binding(CONFIG_DW_ICTL_NAME);
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break;
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default:
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/* The source of the interrupt is in CAVS interrupt logic */
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ret = irq_line_is_enabled_next_level(dev_cavs,
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CAVS_IRQ_NUMBER(irq));
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goto out;
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}
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if (!dev_ictl) {
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LOG_DBG("board: DW intr_control device binding failed");
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ret = -ENODEV;
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goto out;
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}
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ret = irq_line_is_enabled_next_level(dev_ictl, INTR_CNTL_IRQ_NUM(irq));
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out:
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return ret;
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}
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static inline void soc_set_resource_ownership(void)
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{
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volatile struct soc_resource_alloc_regs *regs =
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@ -212,6 +212,7 @@ struct soc_global_regs {
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extern void z_soc_irq_enable(u32_t irq);
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extern void z_soc_irq_disable(u32_t irq);
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extern int z_soc_irq_is_enabled(unsigned int irq);
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extern u32_t soc_get_ref_clk_freq(void);
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