michaelh/zephyr
1
0
Fork 0
Code Releases Activity

riscv: make core code 64-bit compatible

Browse source 
There are two aspects to this: CPU registers are twice as big, and the
load and store instructions must use the 'd' suffix instead of the 'w'
one. To abstract register differences, we simply use a ulong_t instead
of u32_t given that RISC-V is either ILP32 or LP64. And the relevant
lw/sw instructions are replaced by LR/SR (load/store register) that get
defined as either lw/sw or ld/sd. Finally a few constants to deal with
register offsets are also provided.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This commit is contained in:
Nicolas Pitre 2019-07-24 16:21:58 -04:00 • committed by Andrew Boie
commit 0440a815a9
10 changed files with 234 additions and 212 deletions
Download patch file Download diff file Expand all files Collapse all files

14
arch/riscv/core/thread.c
View file

@ -33,10 +33,10 @@ void z_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
stack_size - sizeof(struct __esf));
/* Setup the initial stack frame */
stack_init->a0 = (u32_t)thread_func;
stack_init->a1 = (u32_t)arg1;
stack_init->a2 = (u32_t)arg2;
stack_init->a3 = (u32_t)arg3;
stack_init->a0 = (ulong_t)thread_func;
stack_init->a1 = (ulong_t)arg1;
stack_init->a2 = (ulong_t)arg2;
stack_init->a3 = (ulong_t)arg3;
/*
* Following the RISC-V architecture,
* the MSTATUS register (used to globally enable/disable interrupt),
@ -47,7 +47,7 @@ void z_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
* This shall allow to handle nested interrupts.
*
* Given that context switching is performed via a system call exception
* within the RISCV32 architecture implementation, initially set:
* within the RISCV architecture implementation, initially set:
* 1) MSTATUS to SOC_MSTATUS_DEF_RESTORE in the thread stack to enable
* interrupts when the newly created thread will be scheduled;
* 2) MEPC to the address of the z_thread_entry_wrapper in the thread
@ -61,7 +61,7 @@ void z_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
* thread stack.
*/
stack_init->mstatus = SOC_MSTATUS_DEF_RESTORE;
stack_init->mepc = (u32_t)z_thread_entry_wrapper;
stack_init->mepc = (ulong_t)z_thread_entry_wrapper;
thread->callee_saved.sp = (u32_t)stack_init;
thread->callee_saved.sp = (ulong_t)stack_init;
}