logger: add a SWO backend
This commit adds Serial Wire Output (SWO) logger backend. SWO is an extension of Serial Wire Debug (SWD) port developed by ARM. Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
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e1db8a39af
commit
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4 changed files with 159 additions and 2 deletions
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@ -20,3 +20,9 @@ config CPU_HAS_ARM_SAU
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select CPU_HAS_TEE
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help
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MCU implements the ARM Security Attribution Unit (SAU).
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config HAS_SWO
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bool
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# Omit prompt to signify "hidden" option
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help
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When enabled, indicates that SoC has an SWO output
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@ -33,3 +33,8 @@ zephyr_sources_ifdef(
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CONFIG_LOG_BACKEND_RTT
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log_backend_rtt.c
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)
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zephyr_sources_ifdef(
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CONFIG_LOG_BACKEND_SWO
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log_backend_swo.c
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)
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@ -302,6 +302,31 @@ config LOG_BACKEND_UART
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help
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When enabled backend is using UART to output logs.
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config LOG_BACKEND_SWO
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bool "Enable Serial Wire Output (SWO) backend"
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depends on HAS_SWO
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help
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When enabled, backend will use SWO for logging.
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if LOG_BACKEND_SWO
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config LOG_BACKEND_SWO_FREQ_HZ
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int "Set SWO output frequency"
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default 0
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help
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Set SWO output frequency. Value 0 will select maximum frequency
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supported by the given MCU. Not all debug probes support high
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frequency SWO operation. In this case the frequency has to be set
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manually.
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SWO value defined by this option will be configured at boot. Most SWO
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viewer programs will configure SWO frequency when attached to the
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debug probe. Such configuration will persist only until the device
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reset. To ensure flawless operation the frequency configured here and
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by the SWO viewer program has to match.
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endif # LOG_BACKEND_SWO
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config LOG_BACKEND_RTT
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bool "Enable Segger J-Link RTT backend"
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depends on USE_SEGGER_RTT
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@ -448,14 +473,16 @@ endif # LOG_BACKEND_NET
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config LOG_BACKEND_SHOW_COLOR
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bool "Enable colors in the backend"
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depends on LOG_BACKEND_UART || LOG_BACKEND_NATIVE_POSIX || LOG_BACKEND_RTT
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depends on LOG_BACKEND_UART || LOG_BACKEND_NATIVE_POSIX || LOG_BACKEND_RTT \
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|| LOG_BACKEND_SWO
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default y
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help
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When enabled selected backend prints errors in red and warning in yellow.
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config LOG_BACKEND_FORMAT_TIMESTAMP
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bool "Enable timestamp formatting in the backend"
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depends on LOG_BACKEND_UART || LOG_BACKEND_NATIVE_POSIX || LOG_BACKEND_RTT
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depends on LOG_BACKEND_UART || LOG_BACKEND_NATIVE_POSIX || LOG_BACKEND_RTT \
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|| LOG_BACKEND_SWO
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default y
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help
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When enabled timestamp is formatted to hh:mm:ss:ms,us.
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119
subsys/logging/log_backend_swo.c
Normal file
119
subsys/logging/log_backend_swo.c
Normal file
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@ -0,0 +1,119 @@
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/*
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* Copyright (c) 2018 Piotr Mienkowski
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/** @file
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* @brief Serial Wire Output (SWO) backend implementation.
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*
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* SWO/SWV has been developed by ARM. The following code works only on ARM
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* architecture.
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*
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* An SWO viewer program will typically set-up the SWO port including its
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* frequency when connected to the debug probe. Such configuration can persist
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* only until the MCU reset. The SWO backend initialization function will
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* re-configure the SWO port upon boot and set the frequency as specified by
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* the LOG_BACKEND_SWO_FREQ_HZ Kconfig option. To ensure flawless operation
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* this frequency should much the one set by the SWO viewer program.
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*
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* The initialization code assumes that SWO core frequency is equal to HCLK
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* as defined by SYS_CLOCK_HW_CYCLES_PER_SEC Kconfig option. This may require
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* additional, vendor specific configuration.
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*/
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#include <logging/log_backend.h>
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#include <logging/log_core.h>
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#include <logging/log_msg.h>
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#include <logging/log_output.h>
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#include <soc.h>
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/** The stimulus port from which SWO data is received and displayed */
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#define ITM_PORT_LOGGER 0
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/* Set TPIU prescaler for the current debug trace clock frequency. */
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#if CONFIG_LOG_BACKEND_SWO_FREQ_HZ == 0
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#define SWO_FREQ_DIV 1
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#else
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#define SWO_FREQ (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC \
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+ (CONFIG_LOG_BACKEND_SWO_FREQ_HZ / 2))
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#define SWO_FREQ_DIV (SWO_FREQ / CONFIG_LOG_BACKEND_SWO_FREQ_HZ)
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#if SWO_FREQ_DIV > 0xFFFF
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#error CONFIG_LOG_BACKEND_SWO_FREQ_HZ is too low. SWO clock divider is 16-bit. \
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Minimum supported SWO clock frequency is \
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC/2^16.
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#endif
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#endif
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static u8_t buf[1];
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static int char_out(u8_t *data, size_t length, void *ctx)
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{
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ARG_UNUSED(ctx);
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for (size_t i = 0; i < length; i++) {
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ITM_SendChar(data[i]);
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}
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return length;
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}
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LOG_OUTPUT_DEFINE(log_output, char_out, buf, sizeof(buf));
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static void log_backend_swo_put(const struct log_backend *const backend,
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struct log_msg *msg)
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{
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log_msg_get(msg);
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u32_t flags = LOG_OUTPUT_FLAG_LEVEL | LOG_OUTPUT_FLAG_TIMESTAMP;
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if (IS_ENABLED(CONFIG_LOG_BACKEND_SHOW_COLOR)) {
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flags |= LOG_OUTPUT_FLAG_COLORS;
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}
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if (IS_ENABLED(CONFIG_LOG_BACKEND_FORMAT_TIMESTAMP)) {
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flags |= LOG_OUTPUT_FLAG_FORMAT_TIMESTAMP;
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}
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log_output_msg_process(&log_output, msg, flags);
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log_msg_put(msg);
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}
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static void log_backend_swo_init(void)
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{
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/* Enable DWT and ITM units */
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CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
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/* Enable access to ITM registers */
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ITM->LAR = 0xC5ACCE55;
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/* Disable stimulus ports ITM_STIM0-ITM_STIM31 */
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ITM->TER = 0x0;
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/* Disable ITM */
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ITM->TCR = 0x0;
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/* Select NRZ (UART) encoding protocol */
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TPI->SPPR = 2;
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/* Set SWO baud rate prescaler value: SWO_clk = ref_clock/(ACPR + 1) */
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TPI->ACPR = SWO_FREQ_DIV - 1;
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/* Enable unprivileged access to ITM stimulus ports */
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ITM->TPR = 0x0;
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/* Configure Debug Watchpoint and Trace */
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DWT->CTRL = 0x400003FE;
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/* Configure Formatter and Flush Control Register */
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TPI->FFCR = 0x00000100;
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/* Enable ITM, set TraceBusID=1, no local timestamp generation */
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ITM->TCR = 0x0001000D;
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/* Enable stimulus port used by the logger */
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ITM->TER = 1 << ITM_PORT_LOGGER;
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}
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static void log_backend_swo_panic(struct log_backend const *const backend)
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{
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}
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const struct log_backend_api log_backend_swo_api = {
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.put = log_backend_swo_put,
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.panic = log_backend_swo_panic,
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.init = log_backend_swo_init,
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};
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LOG_BACKEND_DEFINE(log_backend_swo, log_backend_swo_api, true);
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