From 03849370bdb3668f2ecc6875ccd635348ea0a035 Mon Sep 17 00:00:00 2001 From: Aaron Ye Date: Mon, 25 Sep 2023 10:24:30 +0800 Subject: [PATCH] dts: arm: ambiq: Add MSPI instances to Apollo4 Blue Plus SoC. This commit instantiates the MSPI peripherals. Signed-off-by: Aaron Ye --- dts/arm/ambiq/ambiq_apollo4p_blue.dtsi | 30 ++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/dts/arm/ambiq/ambiq_apollo4p_blue.dtsi b/dts/arm/ambiq/ambiq_apollo4p_blue.dtsi index e3af97eac39..80b004c84af 100644 --- a/dts/arm/ambiq/ambiq_apollo4p_blue.dtsi +++ b/dts/arm/ambiq/ambiq_apollo4p_blue.dtsi @@ -174,6 +174,36 @@ ambiq,pwrcfg = <&pwrcfg 0x4 0x100>; }; + mspi0: spi@40060000 { + compatible = "ambiq,mspi"; + reg = <0x40060000 0x400>; + interrupts = <20 0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + ambiq,pwrcfg = <&pwrcfg 0x4 0x4000>; + }; + + mspi1: spi@40061000 { + compatible = "ambiq,mspi"; + reg = <0x40061000 0x400>; + interrupts = <21 0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + ambiq,pwrcfg = <&pwrcfg 0x4 0x8000>; + }; + + mspi2: spi@40062000 { + compatible = "ambiq,mspi"; + reg = <0x40062000 0x400>; + interrupts = <22 0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + ambiq,pwrcfg = <&pwrcfg 0x4 0x10000>; + }; + pinctrl: pin-controller@40010000 { compatible = "ambiq,apollo4-pinctrl"; reg = <0x40010000 0x800>;