boards: nucleo_f410rb: Use dts for clocks configuration

Convert board to use of device tree for clocks configuration.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This commit is contained in:
Alexandre Bourdiol 2021-05-04 09:22:41 +02:00 committed by Kumar Gala
commit 036f8bd6da
2 changed files with 24 additions and 23 deletions

View file

@ -42,6 +42,29 @@
};
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
div-m = <8>;
mul-n = <384>;
div-p = <4>;
div-q = <8>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(96)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
current-speed = <115200>;

View file

@ -2,8 +2,6 @@
CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F410RX=y
# 96MHz system clock (highest value to get a precise USB clock)
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
# Enable MPU
CONFIG_ARM_MPU=y
@ -23,25 +21,5 @@ CONFIG_PINMUX=y
# enable GPIO
CONFIG_GPIO=y
# clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# Clock configuration for Cube Clock control driver
CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# use HSE as PLL input
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
# however, the board does not have an external oscillator, so just use
# the 8MHz clock signal coming from integrated STLink
CONFIG_CLOCK_STM32_HSE_BYPASS=y
# produce 96MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=384
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=4
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=8
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
# APB1 clock must not exceed 50MHz limit
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=1