From 036a76a4cb59bee37b412c5ce81802cb4c1bab51 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Benjamin=20Cab=C3=A9?= Date: Sat, 7 Jun 2025 21:44:41 +0200 Subject: [PATCH] drivers: clock_control: esp32c6: fix modem clock source selection MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Properly default to MODEM_CLOCK_LPCLK_SRC_RC_SLOW in modem LP clock source selection Signed-off-by: Benjamin Cabé --- drivers/clock_control/clock_control_esp32.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clock_control/clock_control_esp32.c b/drivers/clock_control/clock_control_esp32.c index fb73b00aa0a..e5696517c30 100644 --- a/drivers/clock_control/clock_control_esp32.c +++ b/drivers/clock_control/clock_control_esp32.c @@ -98,7 +98,7 @@ static void esp32_clock_perip_init(void) ? MODEM_CLOCK_LPCLK_SRC_RC32K : (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) ? MODEM_CLOCK_LPCLK_SRC_EXT32K - : SOC_RTC_SLOW_CLK_SRC_RC_SLOW); + : MODEM_CLOCK_LPCLK_SRC_RC_SLOW); modem_clock_select_lp_clock_source(PERIPH_WIFI_MODULE, modem_lpclk_src, 0);