boards: we: Add board orthosie1ev
Added new board file of Wurth Electronic board Orthosie-I Signed-off-by: Matthias Hauser <matthias.hauser@we-online.de>
This commit is contained in:
parent
b160063efb
commit
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12 changed files with 500 additions and 0 deletions
6
boards/we/orthosie1ev/Kconfig
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6
boards/we/orthosie1ev/Kconfig
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# Copyright (c) Würth Elektronik GmbH & Co. KG
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# SPDX-License-Identifier: Apache-2.0
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config HEAP_MEM_POOL_ADD_SIZE_BOARD
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int
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default 4096
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10
boards/we/orthosie1ev/Kconfig.sysbuild
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10
boards/we/orthosie1ev/Kconfig.sysbuild
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# Copyright (c) 2024 Würth Elektronik GmbH & Co. KG
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# SPDX-License-Identifier: Apache-2.0
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choice BOOTLOADER
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default BOOTLOADER_MCUBOOT
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endchoice
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choice BOOT_SIGNATURE_TYPE
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default BOOT_SIGNATURE_TYPE_NONE
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endchoice
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5
boards/we/orthosie1ev/Kconfig.we_orthosie1ev
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5
boards/we/orthosie1ev/Kconfig.we_orthosie1ev
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# Copyright (c) 2024 Würth Elektronik GmbH & Co. KG
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_WE_ORTHOSIE1EV
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select SOC_ESP32C3
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9
boards/we/orthosie1ev/board.cmake
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9
boards/we/orthosie1ev/board.cmake
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# SPDX-License-Identifier: Apache-2.0
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if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
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set(OPENOCD OPENOCD-NOTFOUND)
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endif()
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find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
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include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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6
boards/we/orthosie1ev/board.yml
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6
boards/we/orthosie1ev/board.yml
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board:
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name: we_orthosie1ev
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full_name: Orthosie-I-EV
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vendor: we
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socs:
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- name: esp32c3
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BIN
boards/we/orthosie1ev/doc/img/we_orthosie1ev.webp
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BIN
boards/we/orthosie1ev/doc/img/we_orthosie1ev.webp
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Binary file not shown.
After Width: | Height: | Size: 37 KiB |
251
boards/we/orthosie1ev/doc/index.rst
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251
boards/we/orthosie1ev/doc/index.rst
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.. zephyr:board:: we_orthosie1ev
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Overview
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********
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Orthosie-I-EV is an entry-level development board based on Orthosie-I,
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a module named for its small size. This board integrates complete Wi-Fi and Bluetooth® Low Energy functions.
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For more information, check `Orthosie-I Website`_.
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Hardware
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********
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ESP32-C3 is a single-core Wi-Fi and Bluetooth 5 (LE) microcontroller SoC,
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based on the open-source RISC-V architecture. It strikes the right balance of power,
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I/O capabilities and security, thus offering the optimal cost-effective
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solution for connected devices.
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The availability of Wi-Fi and Bluetooth 5 (LE) connectivity not only makes the device configuration easy,
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but it also facilitates a variety of use-cases based on dual connectivity.
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The features include the following:
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- 32-bit core RISC-V microcontroller with a maximum clock speed of 160 MHz
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- 400 KB of internal RAM
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- 802.11b/g/n/e/i
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- A Bluetooth LE subsystem that supports features of Bluetooth 5 and Bluetooth Mesh
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- Various peripherals:
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- 12-bit ADC with up to 6 channels
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- TWAI compatible with CAN bus 2.0
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- Temperature sensor
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- 3x SPI
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- 1x I2S
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- 1x I2C
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- 2x UART
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- LED PWM with up to 6 channels
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- Cryptographic hardware acceleration (RNG, ECC, RSA, SHA-2, AES)
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For more information, check the datasheet at `ESP32-C3 Datasheet`_ or the technical reference
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manual at `ESP32-C3 Technical Reference Manual`_.
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Supported Features
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==================
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Currently Zephyr's ``we_orthosie1ev`` board target supports the following features:
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+------------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+============+============+=====================================+
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| UART | on-chip | serial port |
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+------------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+------------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+------------+------------+-------------------------------------+
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| USB-JTAG | on-chip | hardware interface |
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+------------+------------+-------------------------------------+
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| SPI Master | on-chip | spi |
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+------------+------------+-------------------------------------+
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| Timers | on-chip | counter |
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+------------+------------+-------------------------------------+
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| Watchdog | on-chip | watchdog |
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+------------+------------+-------------------------------------+
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| TRNG | on-chip | entropy |
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+------------+------------+-------------------------------------+
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| LEDC | on-chip | pwm |
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+------------+------------+-------------------------------------+
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| SPI DMA | on-chip | spi |
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+------------+------------+-------------------------------------+
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| TWAI | on-chip | can |
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+------------+------------+-------------------------------------+
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| USB-CDC | on-chip | serial |
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+------------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+------------+------------+-------------------------------------+
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| Wi-Fi | on-chip | |
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+------------+------------+-------------------------------------+
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| Bluetooth | on-chip | |
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+------------+------------+-------------------------------------+
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System requirements
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*******************
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Prerequisites
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=============
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Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
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below to retrieve those files.
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.. code-block:: console
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west blobs fetch hal_espressif
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.. note::
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It is recommended running the command above after :file:`west update`.
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Building & Flashing
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*******************
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Simple boot
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===========
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The board could be loaded using the single binary image, without 2nd stage bootloader.
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It is the default option when building the application without additional configuration.
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.. note::
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Simple boot does not provide any security features nor OTA updates.
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MCUboot bootloader
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==================
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User may choose to use MCUboot bootloader instead. In that case the bootloader
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must be built (and flashed) at least once.
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There are two options to be used when building an application:
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1. Sysbuild
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2. Manual build
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.. note::
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User can select the MCUboot bootloader by adding the following line
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to the board default configuration file.
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.. code:: cfg
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CONFIG_BOOTLOADER_MCUBOOT=y
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Sysbuild
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========
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The sysbuild makes possible to build and flash all necessary images needed to
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bootstrap the board with the ESP32 SoC.
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To build the sample application using sysbuild use the command:
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.. zephyr-app-commands::
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:tool: west
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:zephyr-app: samples/hello_world
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:board: orthosie1ev
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:goals: build
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:west-args: --sysbuild
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:compact:
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By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
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images. But it can be configured to create other kind of images.
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Build directory structure created by sysbuild is different from traditional
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Zephyr build. Output is structured by the domain subdirectories:
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.. code-block::
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build/
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├── hello_world
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│ └── zephyr
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│ ├── zephyr.elf
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│ └── zephyr.bin
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├── mcuboot
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│ └── zephyr
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│ ├── zephyr.elf
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│ └── zephyr.bin
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└── domains.yaml
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.. note::
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With ``--sysbuild`` option the bootloader will be re-build and re-flash
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every time the pristine build is used.
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For more information about the system build please read the :ref:`sysbuild` documentation.
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Manual build
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============
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During the development cycle, it is intended to build & flash as quickly possible.
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For that reason, images can be built one at a time using traditional build.
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The instructions following are relevant for both manual build and sysbuild.
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The only difference is the structure of the build directory.
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.. note::
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Remember that bootloader (MCUboot) needs to be flash at least once.
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Build and flash applications as usual (see :ref:`build_an_application` and
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:ref:`application_run` for more details).
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: orthosie1ev
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:goals: build
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The usual ``flash`` target will work with the ``orthosie1ev`` board
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configuration. Here is an example for the :zephyr:code-sample:`hello_world`
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application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: orthosie1ev
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:goals: flash
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Open the serial monitor using the following command:
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.. code-block:: shell
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west espressif monitor
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After the board has automatically reset and booted, you should see the following
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message in the monitor:
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.. code-block:: console
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***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
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Hello World! orthosie1ev
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Debugging
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*********
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As with much custom hardware, the ESP32-C3 modules require patches to
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OpenOCD that are not upstreamed yet. Espressif maintains their own fork of
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the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_.
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The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the
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``-DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>``
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parameter when building.
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Here is an example for building the :zephyr:code-sample:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: orthosie1ev
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:goals: build flash
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:gen-args: -DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>
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You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: orthosie1ev
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:goals: debug
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References
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**********
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.. target-notes::
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.. _`Orthosie-I Website`: https://www.we-online.com/en/components/products/ORTHOSIE-I
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.. _`ESP32-C3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf
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.. _`ESP32-C3 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf
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.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases
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11
boards/we/orthosie1ev/support/openocd.cfg
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11
boards/we/orthosie1ev/support/openocd.cfg
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set ESP_RTOS none
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# ESP32C3 has built-in JTAG interface over USB port in pins GPIO18/GPIO19 (D-/D+).
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# Uncomment the line below to enable USB debugging.
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# source [find interface/esp_usb_jtag.cfg]
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# Otherwise, use external JTAG programmer as ESP-Prog
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source [find interface/ftdi/esp32_devkitj_v1.cfg]
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source [find target/esp32c3.cfg]
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adapter speed 5000
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66
boards/we/orthosie1ev/we_orthosie1ev-pinctrl.dtsi
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66
boards/we/orthosie1ev/we_orthosie1ev-pinctrl.dtsi
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/*
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* Copyright (c) Würth Elektronik GmbH & Co. KG
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
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#include <dt-bindings/pinctrl/esp32c3-pinctrl.h>
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#include <zephyr/dt-bindings/pinctrl/esp32c3-gpio-sigmap.h>
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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pinmux = <UART0_TX_GPIO21>;
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output-high;
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};
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group2 {
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pinmux = <UART0_RX_GPIO20>;
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bias-pull-up;
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};
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};
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spim2_default: spim2_default {
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group1 {
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pinmux = <SPIM2_MISO_GPIO2>,
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<SPIM2_SCLK_GPIO6>,
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<SPIM2_CSEL_GPIO10>;
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};
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group2 {
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pinmux = <SPIM2_MOSI_GPIO7>;
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output-low;
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};
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};
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i2c0_default: i2c0_default {
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group1 {
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pinmux = <I2C0_SDA_GPIO1>,
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<I2C0_SCL_GPIO3>;
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bias-pull-up;
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drive-open-drain;
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output-high;
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};
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};
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i2s_default: i2s_default {
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group1 {
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pinmux = <I2S_MCLK_GPIO6>,
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<I2S_O_WS_GPIO5>,
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<I2S_O_BCK_GPIO4>,
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<I2S_O_SD_GPIO18>;
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output-enable;
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};
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group2 {
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pinmux = <I2S_I_SD_GPIO19>;
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input-enable;
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};
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};
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twai_default: twai_default {
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group1 {
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pinmux = <TWAI_TX_GPIO4>,
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<TWAI_RX_GPIO5>;
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};
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};
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};
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105
boards/we/orthosie1ev/we_orthosie1ev.dts
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105
boards/we/orthosie1ev/we_orthosie1ev.dts
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/*
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* Copyright (c) 2024 Würth Elektronik GmbH & Co. KG
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <espressif/esp32c3/esp32c3.dtsi>
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#include "we_orthosie1ev-pinctrl.dtsi"
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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#include <espressif/partitions_0x0_default.dtsi>
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/ {
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model = "we_orthosie1ev";
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compatible = "we,we-orthosie1ev";
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chosen {
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zephyr,sram = &sram0;
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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zephyr,flash = &flash0;
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zephyr,code-partition = &slot0_partition;
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zephyr,bt-hci = &esp32_bt_hci;
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};
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aliases {
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sw0 = &user_button1;
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i2c-0 = &i2c0;
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watchdog0 = &wdt0;
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};
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gpio_keys {
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compatible = "gpio-keys";
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user_button1: button_1 {
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label = "User SW1";
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gpios = <&gpio0 3 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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zephyr,code = <INPUT_KEY_0>;
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};
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};
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};
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&uart0 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart0_default>;
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pinctrl-names = "default";
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};
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&usb_serial {
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/* requires resoldering of resistors on the board */
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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pinctrl-0 = <&i2c0_default>;
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pinctrl-names = "default";
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};
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&i2s {
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pinctrl-0 = <&i2s_default>;
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pinctrl-names = "default";
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status = "disabled";
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};
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&trng0 {
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status = "okay";
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};
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&spi2 {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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pinctrl-0 = <&spim2_default>;
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pinctrl-names = "default";
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};
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&gpio0 {
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status = "okay";
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};
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&wdt0 {
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status = "okay";
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};
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&timer0 {
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status = "disabled";
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};
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&timer1 {
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status = "disabled";
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};
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&twai {
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/* requires external CAN transceiver or jumper on RX and TX pins for loopback testing */
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status = "disabled";
|
||||
pinctrl-0 = <&twai_default>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&esp32_bt_hci {
|
||||
status = "okay";
|
||||
};
|
23
boards/we/orthosie1ev/we_orthosie1ev.yaml
Normal file
23
boards/we/orthosie1ev/we_orthosie1ev.yaml
Normal file
|
@ -0,0 +1,23 @@
|
|||
identifier: we_orthosie1ev
|
||||
name: we_orthosie1ev
|
||||
type: mcu
|
||||
arch: riscv
|
||||
toolchain:
|
||||
- zephyr
|
||||
supported:
|
||||
- adc
|
||||
- gpio
|
||||
- i2c
|
||||
- i2s
|
||||
- watchdog
|
||||
- uart
|
||||
- dma
|
||||
- pwm
|
||||
- spi
|
||||
- counter
|
||||
- entropy
|
||||
testing:
|
||||
ignore_tags:
|
||||
- net
|
||||
- bluetooth
|
||||
vendor: we
|
8
boards/we/orthosie1ev/we_orthosie1ev_defconfig
Normal file
8
boards/we/orthosie1ev/we_orthosie1ev_defconfig
Normal file
|
@ -0,0 +1,8 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_MAIN_STACK_SIZE=2048
|
||||
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_SERIAL=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
CONFIG_GPIO=y
|
Loading…
Add table
Add a link
Reference in a new issue