nxp: imx8ulp: enable clock control
Enable clock control for i.MX8ULP. This consists of: 1) Adding a PCC node in the DTS 2) Adding a header file containing the definitions of the clocks used by the peripherals to be enabled. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
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3 changed files with 27 additions and 0 deletions
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@ -5,3 +5,5 @@ CONFIG_BUILD_OUTPUT_BIN=n
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CONFIG_DYNAMIC_INTERRUPTS=y
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CONFIG_DYNAMIC_INTERRUPTS=y
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CONFIG_LOG=y
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CONFIG_LOG=y
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CONFIG_CLOCK_CONTROL=y
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@ -6,6 +6,7 @@
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#include <xtensa/xtensa.dtsi>
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#include <xtensa/xtensa.dtsi>
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#include <mem.h>
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#include <mem.h>
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#include <zephyr/dt-bindings/clock/imx8ulp_clock.h>
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/ {
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/ {
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cpus {
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cpus {
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@ -30,4 +31,10 @@
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compatible = "mmio-sram";
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compatible = "mmio-sram";
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reg = <0x8e800000 DT_SIZE_K(512)>;
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reg = <0x8e800000 DT_SIZE_K(512)>;
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};
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};
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pcc4: clock-controller@29800000 {
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compatible = "nxp,kinetis-pcc";
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reg = <0x29800000 DT_SIZE_K(64)>;
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#clock-cells = <2>;
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};
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};
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};
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18
include/zephyr/dt-bindings/clock/imx8ulp_clock.h
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18
include/zephyr/dt-bindings/clock/imx8ulp_clock.h
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@ -0,0 +1,18 @@
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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _INCLUDE_ZEPHYR_DT_BINDINGS_CLOCK_IMX8ULP_CLOCK_H_
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#define _INCLUDE_ZEPHYR_DT_BINDINGS_CLOCK_IMX8ULP_CLOCK_H_
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/* IMPORTANT: the indexes used by these macros need to
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* match the indexes in the PCC driver LUT at which the
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* corresponding clock ID encoding can be found.
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*/
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/* clocks managed by PCC4 */
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#define IMX8ULP_CLOCK_LPUART7 0
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#endif /* _INCLUDE_ZEPHYR_DT_BINDINGS_CLOCK_IMX8ULP_CLOCK_H_ */
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