dts: pwm: gd,gd32-pwm: add period to PWM cells

Add the period cell to GD32 PWM compatible and update all boards
accordingly. A period of 20 ms (50 Hz) has been set for all PWM LEDs.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2022-04-05 19:38:25 +02:00 committed by Carles Cufí
commit 02aec77f77
11 changed files with 48 additions and 47 deletions

View file

@ -60,7 +60,7 @@
/* NOTE: bridge TIMER0_CH0 (PA8) and LED1 (PC0) */
pwm_led: pwm_led {
pwms = <&pwm0 0 PWM_POLARITY_NORMAL>;
pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};

View file

@ -64,7 +64,7 @@
/* NOTE: bridge TIMER0_CH0 (PA8) and LED2 (PF0) */
pwm_led: pwm_led {
pwms = <&pwm0 0 PWM_POLARITY_NORMAL>;
pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};

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@ -56,7 +56,7 @@
/* NOTE: bridge TIMER1_CH2 (PB10) and LED1 (PE2) */
pwm_led: pwm_led {
pwms = <&pwm1 2 PWM_POLARITY_NORMAL>;
pwms = <&pwm1 2 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};

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@ -41,7 +41,7 @@
/* NOTE: pwm_led and led1 are share same pin (PA7). */
/* When CONFIG_PWM=y it can only be controlled using the PWM API. */
pwm_led: pwm_led {
pwms = <&pwm2 1 PWM_POLARITY_NORMAL>;
pwms = <&pwm2 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};

View file

@ -68,7 +68,7 @@
/* NOTE: bridge TIMER0_CH0 (PA8) and LED1 (PC0) */
pwm_led: pwm_led {
pwms = <&pwm0 0 PWM_POLARITY_NORMAL>;
pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};

View file

@ -41,12 +41,12 @@
/* NOTE: bridge TIMER1_CH1 and LED_GREEN (PA1) */
pwm_led_green: pwm_led_green {
pwms = <&pwm1 1 PWM_POLARITY_NORMAL>;
pwms = <&pwm1 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
label = "PWM_LED_G";
};
/* NOTE: bridge TIMER1_CH2 and LED_BLUE (PA2) */
pwm_led_blue: pwm_led_blue {
pwms = <&pwm1 2 PWM_POLARITY_NORMAL>;
pwms = <&pwm1 2 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
label = "PWM_LED_B";
};
};