boards: x86: acrn_ehl_crb: add APIC timer TSC M and N

The acrn_ehl_crb used the APIC timer but did not configure the TSC
M and N parameters, which are advised where available. This adds
the values consistent with native (ehl_crb) definition.

Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
This commit is contained in:
Jennifer Williams 2021-05-03 17:03:16 -07:00 committed by Kumar Gala
commit 027ce3d458

View file

@ -16,3 +16,5 @@ CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN=n
CONFIG_KERNEL_VM_SIZE=0x1000000
CONFIG_BUILD_NO_GAP_FILL=y
CONFIG_APIC_TIMER_IRQ=48
CONFIG_APIC_TIMER_TSC_M=3
CONFIG_APIC_TIMER_TSC_N=249