drivers: nrf: Flush RX fifo in UARTE Async API.
After RX is disabled during receiving, some bytes are received to internal fifo. To not interfere with further transactions fifo has to be flushed. Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
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39930ca298
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0278f9bc72
1 changed files with 17 additions and 2 deletions
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@ -712,6 +712,15 @@ static void endrx_isr(struct device *dev)
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NRF_UARTE_Type *uarte = get_uarte_instance(dev);
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if (!data->async->rx_enabled) {
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if (data->async->rx_buf == NULL) {
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/* This condition can occur only after triggering
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* FLUSHRX task.
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*/
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struct uart_event evt = {
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.type = UART_RX_DISABLED,
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};
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user_callback(dev, &evt);
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}
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return;
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}
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@ -783,9 +792,15 @@ static void rxto_isr(struct device *dev)
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user_callback(dev, &evt);
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data->async->rx_next_buf = NULL;
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}
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evt.type = UART_RX_DISABLED;
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user_callback(dev, &evt);
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/* Flushing RX fifo requires buffer bigger than 4 bytes to empty fifo */
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static u8_t flush_buf[5];
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nrf_uarte_rx_buffer_set(get_uarte_instance(dev), flush_buf, 5);
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/* Final part of handling RXTO event is in ENDRX interrupt handler.
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* ENDRX is generated as a result of FLUSHRX task.
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*/
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nrf_uarte_task_trigger(get_uarte_instance(dev), NRF_UARTE_TASK_FLUSHRX);
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}
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static void txstopped_isr(struct device *dev)
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