diff --git a/drivers/pinctrl/CMakeLists.txt b/drivers/pinctrl/CMakeLists.txt
index e357a15024c..f7a65a664c9 100644
--- a/drivers/pinctrl/CMakeLists.txt
+++ b/drivers/pinctrl/CMakeLists.txt
@@ -29,3 +29,4 @@ zephyr_library_sources_ifdef(CONFIG_PINCTRL_SMARTBOND pinctrl_smartbond.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_XMC4XXX pinctrl_xmc4xxx.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_S32 pinctrl_nxp_s32.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_GECKO pinctrl_gecko.c)
+zephyr_library_sources_ifdef(CONFIG_PINCTRL_TI_K3 pinctrl_ti_k3.c)
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 2f491ae5090..19d72843efa 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -58,5 +58,6 @@ source "drivers/pinctrl/Kconfig.smartbond"
 source "drivers/pinctrl/Kconfig.xmc4xxx"
 source "drivers/pinctrl/Kconfig.nxp_s32"
 source "drivers/pinctrl/Kconfig.gecko"
+source "drivers/pinctrl/Kconfig.ti_k3"
 
 endif # PINCTRL
diff --git a/drivers/pinctrl/Kconfig.ti_k3 b/drivers/pinctrl/Kconfig.ti_k3
new file mode 100644
index 00000000000..43b140c58a1
--- /dev/null
+++ b/drivers/pinctrl/Kconfig.ti_k3
@@ -0,0 +1,9 @@
+# Copyright (c) 2023 Enphase Energy
+# SPDX-License-Identifier: Apache-2.0
+
+config PINCTRL_TI_K3
+	bool "TI K3 pinctrl driver"
+	default y
+	depends on DT_HAS_TI_K3_PINCTRL_ENABLED
+	help
+	  Enable the TI K3 pinctrl driver
diff --git a/drivers/pinctrl/pinctrl_ti_k3.c b/drivers/pinctrl/pinctrl_ti_k3.c
new file mode 100644
index 00000000000..e4e4f6289ab
--- /dev/null
+++ b/drivers/pinctrl/pinctrl_ti_k3.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2023 Enphase Energy
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#define DT_DRV_COMPAT ti_k3_pinctrl
+
+#include <zephyr/arch/cpu.h>
+#include <zephyr/drivers/pinctrl.h>
+
+#define PINCTRL_NODE DT_NODELABEL(pinctrl)
+
+static struct pinctrl_ti_k3_dev_data {
+	DEVICE_MMIO_RAM;
+} pinctrl_ti_k3_dev;
+
+static struct pinctrl_ti_k3_cfg_data {
+	DEVICE_MMIO_ROM;
+} pinctrl_ti_k3_cfg = {
+	DEVICE_MMIO_ROM_INIT(PINCTRL_NODE)
+};
+
+int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
+{
+	ARG_UNUSED(reg);
+	const struct device *dev = DEVICE_DT_GET(PINCTRL_NODE);
+	uintptr_t virt_reg_base = DEVICE_MMIO_GET(dev);
+
+	for (uint8_t i = 0; i < pin_cnt; i++) {
+		sys_write32(pins[i].value, virt_reg_base + pins[i].offset);
+	}
+
+	return 0;
+}
+
+static int pinctrl_ti_k3_init(const struct device *dev)
+{
+	DEVICE_MMIO_MAP(dev, K_MEM_CACHE_NONE);
+	return 0;
+}
+
+DEVICE_DT_DEFINE(PINCTRL_NODE,
+		 pinctrl_ti_k3_init,
+		 NULL,
+		 &pinctrl_ti_k3_dev,
+		 &pinctrl_ti_k3_cfg,
+		 PRE_KERNEL_1,
+		 CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
+		 NULL);
diff --git a/dts/bindings/pinctrl/ti,k3-pinctrl.yaml b/dts/bindings/pinctrl/ti,k3-pinctrl.yaml
new file mode 100644
index 00000000000..600baa3292f
--- /dev/null
+++ b/dts/bindings/pinctrl/ti,k3-pinctrl.yaml
@@ -0,0 +1,39 @@
+# Copyright (c) 2023 Enphase Energy
+# SPDX-License-Identifier: Apache-2.0
+
+description: |
+  TI K3 pinctrl node.
+
+  Pins can be configured using the following macro "K3_PINMUX(offset, value, mux_mode)".
+  offset - the pin attribute register offset from the base address.
+  value - one of the following:
+    PIN_OUTPUT
+    PIN_OUTPUT_PULLUP
+    PIN_OUTPUT_PULLDOWN
+    PIN_INPUT
+    PIN_INPUT_PULLUP
+    PIN_INPUT_PULLDOWN
+  mux_mode - The mux mode for the pin, MUX_MODE_0 -> MUX_MODE_9.
+  e.g. for AM62x the pinctrl base address is 0xf4000.
+       The default UART0_RX pin is located at 0x000f41c8 (mux mode 0).
+       So the configuration would be "K3_PINMUX(0x1c8, PIN_INPUT, MUX_MODE_0)".
+
+compatible: "ti,k3-pinctrl"
+
+include: base.yaml
+
+properties:
+  reg:
+    required: true
+
+child-binding:
+  description: |
+    This binding gives a base representation of the TI K3
+    pin configuration.
+
+  properties:
+    pinmux:
+      required: true
+      type: array
+      description: |
+        TI K3 pin configuration.
diff --git a/include/zephyr/dt-bindings/pinctrl/ti-k3-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/ti-k3-pinctrl.h
new file mode 100644
index 00000000000..b50e784625d
--- /dev/null
+++ b/include/zephyr/dt-bindings/pinctrl/ti-k3-pinctrl.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2023 Enphase Energy
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_TI_K3_PINCTRL_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_TI_K3_PINCTRL_H_
+
+#define PULLUDEN_SHIFT		16
+#define PULLTYPESEL_SHIFT	17
+#define RXACTIVE_SHIFT		18
+
+#define PULL_DISABLE		(1 << PULLUDEN_SHIFT)
+#define PULL_ENABLE		(0 << PULLUDEN_SHIFT)
+
+#define PULL_UP			((1 << PULLTYPESEL_SHIFT) | PULL_ENABLE)
+#define PULL_DOWN		((0 << PULLTYPESEL_SHIFT) | PULL_ENABLE)
+
+#define INPUT_ENABLE		(1 << RXACTIVE_SHIFT)
+#define INPUT_DISABLE		(0 << RXACTIVE_SHIFT)
+
+/* Only the following macros are intended be used in DTS files */
+
+#define PIN_OUTPUT		(INPUT_DISABLE | PULL_DISABLE)
+#define PIN_OUTPUT_PULLUP	(INPUT_DISABLE | PULL_UP)
+#define PIN_OUTPUT_PULLDOWN	(INPUT_DISABLE | PULL_DOWN)
+#define PIN_INPUT		(INPUT_ENABLE | PULL_DISABLE)
+#define PIN_INPUT_PULLUP	(INPUT_ENABLE | PULL_UP)
+#define PIN_INPUT_PULLDOWN	(INPUT_ENABLE | PULL_DOWN)
+
+#define MUX_MODE_0		0
+#define MUX_MODE_1		1
+#define MUX_MODE_2		2
+#define MUX_MODE_3		3
+#define MUX_MODE_4		4
+#define MUX_MODE_5		5
+#define MUX_MODE_6		6
+#define MUX_MODE_7		7
+#define MUX_MODE_8		8
+#define MUX_MODE_9		9
+
+#define K3_PINMUX(offset, value, mux_mode)	(((offset) & 0x1fff)) ((value) | (mux_mode))
+
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_TI_K3_PINCTRL_H_ */