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it8xxx2/espi: protect clear OBF request

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At default, IBF (input buffer full) interrupt status will be cleared
after reading keyboard data input register (KBHIDIR) in ISR.
For request to clear OBF (output buffer full), we need to enable clear
mode. In the mode, IBF status cannot be cleared by reading KBHIDIR
register. It means that if AP output data to 60h/64h port during the
mode enable, IBF interrupt will keep triggering until the watchdog is
reset. This patch addresses this issue.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit is contained in:
Dino Li 2022-12-27 12:01:52 +08:00 • committed by Fabio Baltieri
commit 02578cb834
1 changed files with 8 additions and 0 deletions
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8
drivers/espi/espi_it8xxx2.c
View file

@ -837,6 +837,13 @@ static int espi_it8xxx2_write_lpc_request(const struct device *dev,
kbc_reg->KBHICR &= ~KBC_KBHICR_IBFCIE; kbc_reg->KBHICR &= ~KBC_KBHICR_IBFCIE;
break; break;
case E8042_CLEAR_OBF: case E8042_CLEAR_OBF:
/*
* After enabling IBF/OBF clear mode, we have to make
* sure that IBF interrupt is not triggered before
* disabling the clear mode. Or the interrupt will keep
* triggering until the watchdog is reset.
*/
unsigned int key = irq_lock();
/* /*
* When IBFOBFCME is enabled, write 1 to COBF bit to * When IBFOBFCME is enabled, write 1 to COBF bit to
* clear KBC OBF. * clear KBC OBF.
@ -846,6 +853,7 @@ static int espi_it8xxx2_write_lpc_request(const struct device *dev,
kbc_reg->KBHICR &= ~KBC_KBHICR_COBF; kbc_reg->KBHICR &= ~KBC_KBHICR_COBF;
/* Disable clear mode */ /* Disable clear mode */
kbc_reg->KBHICR &= ~KBC_KBHICR_IBFOBFCME; kbc_reg->KBHICR &= ~KBC_KBHICR_IBFOBFCME;
irq_unlock(key);
break; break;
case E8042_SET_FLAG: case E8042_SET_FLAG:
kbc_reg->KBHISR |= (*data & 0xff); kbc_reg->KBHISR |= (*data & 0xff);