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soc: andestech: run pma_init_per_core() with soc_per_core_init_hook()

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The function `pma_init_per_core()`, as its name suggest, should be
run from every core, so call it from `soc_per_core_init_hook()`

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
This commit is contained in:
Yong Cong Sin 2024-10-30 22:42:27 +08:00 • committed by Anas Nashif
commit 01b69e9c22
5 changed files with 33 additions and 9 deletions
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1
soc/andestech/ae350/CMakeLists.txt
View file

@ -3,6 +3,7 @@
zephyr_include_directories(.) zephyr_include_directories(.)
zephyr_sources( zephyr_sources(
soc.c
start.S start.S
soc_irq.S soc_irq.S
) )

1
soc/andestech/ae350/Kconfig
View file

@ -92,6 +92,7 @@ config SOC_ANDES_V5_PMA
bool "Andes V5 Physical Memory Attribute (PMA)" bool "Andes V5 Physical Memory Attribute (PMA)"
select ARCH_HAS_NOCACHE_MEMORY_SUPPORT select ARCH_HAS_NOCACHE_MEMORY_SUPPORT
select SOC_EARLY_INIT_HOOK select SOC_EARLY_INIT_HOOK
select SOC_PER_CORE_INIT_HOOK
help help
This option enables the Andes V5 PMA, in order to support SW to This option enables the Andes V5 PMA, in order to support SW to
configure physical memory attribute by PMA CSRs. The address configure physical memory attribute by PMA CSRs. The address

9
soc/andestech/ae350/pma.c
View file

@ -187,13 +187,6 @@ static void configure_nocache_region(void)
} }
#endif /* CONFIG_NOCACHE_MEMORY */ #endif /* CONFIG_NOCACHE_MEMORY */
/*
* @brief Init PMA CSRs of each CPU core
*
* In SMP, each CPU has it's own PMA CSR and PMA CSR only affect one CPU.
* We should configure CSRs of all CPUs to make memory attribute
* (e.g. uncacheable) affects all CPUs.
*/
void pma_init_per_core(void) void pma_init_per_core(void)
{ {
#ifdef CONFIG_NOCACHE_MEMORY #ifdef CONFIG_NOCACHE_MEMORY
@ -218,6 +211,4 @@ void soc_early_init_hook(void)
#endif #endif
return; return;
} }
pma_init_per_core();
} }

15
soc/andestech/ae350/pma.h Normal file
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@ -0,0 +1,15 @@
/*
* Copyright (c) 2021 Andes Technology Corporation
* Copyright (c) 2024 Meta Platforms
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* @brief Init PMA CSRs of each CPU core
*
* In SMP, each CPU has it's own PMA CSR and PMA CSR only affect one CPU.
* We should configure CSRs of all CPUs to make memory attribute
* (e.g. uncacheable) affects all CPUs.
*/
void pma_init_per_core(void);

16
soc/andestech/ae350/soc.c Normal file
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@ -0,0 +1,16 @@
/*
* Copyright (c) 2024 Meta Platforms
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "pma.h"
#ifdef CONFIG_SOC_PER_CORE_INIT_HOOK
void soc_per_core_init_hook(void)
{
#ifdef CONFIG_SOC_ANDES_V5_PMA
pma_init_per_core();
#endif /* SOC_ANDES_V5_PMA */
}
#endif /* CONFIG_SOC_PER_CORE_INIT_HOOK */