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dts: set the riscv,isa property for virt-based targets

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This commit makes the devicetrees of the targets that are based on the QEMU
`virt` machine more consistent with the rest of the RISC-V targets in
Zephyr by:
* adding the `riscv,isa` property
* adding a compatible string which uniquely identifies the `virt` core

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commit is contained in:
Filip Kokosinski 2024-04-25 13:18:46 +02:00 • committed by Alberto Escolar
commit 00b2ef8744
9 changed files with 112 additions and 13 deletions
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2
boards/qemu/riscv32/qemu_riscv32.dts
View file

@ -2,7 +2,7 @@
/dts-v1/;
#include <virt.dtsi>
#include <qemu/virt-riscv32.dtsi>
/ {
chosen {

2
boards/qemu/riscv32/qemu_riscv32_qemu_virt_riscv32_smp.dts
View file

@ -2,7 +2,7 @@
/dts-v1/;
#include <virt.dtsi>
#include <qemu/virt-riscv32.dtsi>
/ {
chosen {

2
boards/qemu/riscv32e/qemu_riscv32e.dts
View file

@ -7,7 +7,7 @@
/dts-v1/;
#include <virt.dtsi>
#include <qemu/virt-riscv32.dtsi>
/ {
chosen {

2
boards/qemu/riscv64/qemu_riscv64.dts
View file

@ -3,7 +3,7 @@
/dts-v1/;
#include <virt.dtsi>
#include <qemu/virt-riscv64.dtsi>
/ {
chosen {

2
boards/qemu/riscv64/qemu_riscv64_qemu_virt_riscv64_smp.dts
View file

@ -3,7 +3,7 @@
/dts-v1/;
#include <virt.dtsi>
#include <qemu/virt-riscv64.dtsi>
/ {
chosen {