riscv: new TLS-based arch_is_user_context() implementation

This reverts the bulk of commit c8bfc2afda ("riscv: make
arch_is_user_context() SMP compatible") and replaces it with a flag
stored in the thread local storage (TLS) area, therefore making TLS
mandatory for userspace support on RISC-V.

This has many advantages:

- The tp (x4) register is already dedicated by the standard for this
  purpose, making TLS support almost free.

- This is very efficient, requiring only a single instruction to clear
  and 2 instructions to set.

- This makes the SMP case much more efficient. No need for funky
  exception code any longer.

- SMP and non-SMP now use the same implementation making maintenance
  easier.

- The is_user_mode variable no longer requires a dedicated PMP mapping
  and therefore freeing one PMP slot for other purposes.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>

5f65dbcc9dab3d39473b05397e05.

arch/riscv/core/thread.c

@@ -11,12 +11,11 @@
 #include <stdio.h>
 #include <pmp.h>
 
-#if defined(CONFIG_USERSPACE) && !defined(CONFIG_SMP)
+#ifdef CONFIG_USERSPACE
 /*
- * Glogal variable used to know the current mode running.
- * Is not boolean because it must match the PMP granularity of the arch.
+ * Per-thread (TLS) variable indicating whether execution is in user mode.
  */
-uint32_t is_user_mode;
+__thread uint8_t is_user_mode;
 #endif
 
 void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
@@ -246,9 +245,7 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry,
 	/* exception stack has to be in mscratch */
 	csr_write(mscratch, top_of_priv_stack);
 
-#if !defined(CONFIG_SMP)
 	is_user_mode = true;
-#endif
 
 	register void *a0 __asm__("a0") = user_entry;
 	register void *a1 __asm__("a1") = p1;